Struct esp8266::spi0::spi_ctrl::W [−][src]
pub struct W(_);Expand description
Register SPI_CTRL writer
Implementations
Bit 26 - In “command”, “address”, “write-data” (MOSI) phases, 1: LSB first; 0: MSB first
Bit 25 - In “read-data” (MISO) phase, 1: LSB first; 0: MSB first
Bit 24 - In the read operations, “address” phase and “read-data” phase apply 4 signals
Bit 23 - In the read operations, “address” phase and “read-data” phase apply 2 signals
Bit 20 - In the read operations, “read-data” phase apply 4 signals
Bit 14 - In the read operations, “read-data” phase apply 2 signals
Bit 13 - this bit enable the bits: spi_qio_mode, spi_dio_mode, spi_qout_mode and spi_dout_mode
Bit 22 - Enable two byte status
Bit 19 - Share bus
Bit 18 - Hold mode
Bit 17 - Enable AHB
Bit 15 - ‘Res and res’?
Methods from Deref<Target = W<SPI_CTRL_SPEC>>
Trait Implementations
Performs the conversion.