Struct esp8266::spi::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub spi_cmd: SPI_CMD,
    pub spi_addr: SPI_ADDR,
    pub spi_ctrl: SPI_CTRL,
    pub spi_rd_status: SPI_RD_STATUS,
    pub spi_ctrl2: SPI_CTRL2,
    pub spi_clock: SPI_CLOCK,
    pub spi_user: SPI_USER,
    pub spi_user1: SPI_USER1,
    pub spi_user2: SPI_USER2,
    pub spi_wr_status: SPI_WR_STATUS,
    pub spi_pin: SPI_PIN,
    pub spi_slave: SPI_SLAVE,
    pub spi_slave1: SPI_SLAVE1,
    pub spi_slave2: SPI_SLAVE2,
    pub spi_slave3: SPI_SLAVE3,
    pub spi_w0: SPI_W0,
    pub spi_w1: SPI_W1,
    pub spi_w2: SPI_W2,
    pub spi_w3: SPI_W3,
    pub spi_w4: SPI_W4,
    pub spi_w5: SPI_W5,
    pub spi_w6: SPI_W6,
    pub spi_w7: SPI_W7,
    pub spi_w8: SPI_W8,
    pub spi_w9: SPI_W9,
    pub spi_w10: SPI_W10,
    pub spi_w11: SPI_W11,
    pub spi_w12: SPI_W12,
    pub spi_w13: SPI_W13,
    pub spi_w14: SPI_W14,
    pub spi_w15: SPI_W15,
    // some fields omitted
}

Register block

Fields

spi_cmd: SPI_CMD

0x00 - In the master mode, it is the start bit of a single operation. Self-clear by hardware

spi_addr: SPI_ADDR

0x04 - In the master mode, it is the value of address in "address" phase.

spi_ctrl: SPI_CTRL

0x08 - SPI_CTRL

spi_rd_status: SPI_RD_STATUS

0x10 - In the slave mode, this register are the status register for the master to read out.

spi_ctrl2: SPI_CTRL2

0x14 - spi_cs signal is delayed by 80MHz clock cycles

spi_clock: SPI_CLOCK

0x18 - In the master mode, 1: spi_clk is eqaul to 80MHz, 0: spi_clk is divided from 80 MHz clock.

spi_user: SPI_USER

0x1c - This bit enable the "command" phase of an operation.

spi_user1: SPI_USER1

0x20 - The length in bits of "address" phase. The register value shall be (bit_num-1)

spi_user2: SPI_USER2

0x24 - The length in bits of "command" phase. The register value shall be (bit_num-1)

spi_wr_status: SPI_WR_STATUS

0x28 - In the slave mode, this register are the status register for the master to write into.

spi_pin: SPI_PIN

0x2c - 1: disable CS2; 0: spi_cs signal is from/to CS2 pin

spi_slave: SPI_SLAVE

0x30 - It is the synchronous reset signal of the module. This bit is self-cleared by hardware.

spi_slave1: SPI_SLAVE1

0x34 - In the slave mode, it is the length in bits for "write-status" and "read-status" operations. The register valueshall be (bit_num-1)

spi_slave2: SPI_SLAVE2

0x38 - In the slave mode, it is the length in spi_clk cycles "dummy" phase for "write-buffer" operations. The registervalue shall be (cycle_num-1)

spi_slave3: SPI_SLAVE3

0x3c - In slave mode, it is the value of "write-status" command

spi_w0: SPI_W0

0x40 - the data inside the buffer of the SPI module, byte 0

spi_w1: SPI_W1

0x60 - the data inside the buffer of the SPI module, byte 1

spi_w2: SPI_W2

0x80 - the data inside the buffer of the SPI module, byte 2

spi_w3: SPI_W3

0xa0 - the data inside the buffer of the SPI module, byte 3

spi_w4: SPI_W4

0xc0 - the data inside the buffer of the SPI module, byte 4

spi_w5: SPI_W5

0xe0 - the data inside the buffer of the SPI module, byte 5

spi_w6: SPI_W6

0x100 - the data inside the buffer of the SPI module, byte 6

spi_w7: SPI_W7

0x120 - the data inside the buffer of the SPI module, byte 7

spi_w8: SPI_W8

0x140 - the data inside the buffer of the SPI module, byte 8

spi_w9: SPI_W9

0x160 - the data inside the buffer of the SPI module, byte 9

spi_w10: SPI_W10

0x180 - the data inside the buffer of the SPI module, byte 10

spi_w11: SPI_W11

0x1a0 - the data inside the buffer of the SPI module, byte 11

spi_w12: SPI_W12

0x1c0 - the data inside the buffer of the SPI module, byte 12

spi_w13: SPI_W13

0x1e0 - the data inside the buffer of the SPI module, byte 13

spi_w14: SPI_W14

0x200 - the data inside the buffer of the SPI module, byte 14

spi_w15: SPI_W15

0x220 - the data inside the buffer of the SPI module, byte 15