Expand description
Universal Host Controller Interface 0
Re-exports§
pub use self::reg_q::REG_Q;
Modules§
- ack_num
- UHCI ACK number configuration
- app_
int_ set - Software interrupt trigger source
- conf0
- UHCI configuration register
- conf1
- UHCI configuration register
- date
- UHCI version control register
- esc_
conf - Escape sequence configuration register %s
- escape_
conf - Escape character configuration
- hung_
conf - Timeout configuration
- int_clr
- Interrupt clear bits
- int_ena
- Interrupt enable bits
- int_raw
- Raw interrupt status
- int_st
- Masked interrupt status
- pkt_
thres - Configure register for packet length
- quick_
sent - UHCI quick send configuration register
- reg_q
- Cluster Cluster REG_Q%s, containing REG_Q?_WORD0, REG_Q?_WORD1
- rx_head
- UHCI packet header register
- state0
- UHCI receive status
- state1
- UHCI transmit status
Structs§
- Register
Block - Register block
Type Aliases§
- ACK_NUM
- ACK_NUM (rw) register accessor: UHCI ACK number configuration
- APP_
INT_ SET - APP_INT_SET (w) register accessor: Software interrupt trigger source
- CONF0
- CONF0 (rw) register accessor: UHCI configuration register
- CONF1
- CONF1 (rw) register accessor: UHCI configuration register
- DATE
- DATE (rw) register accessor: UHCI version control register
- ESCAPE_
CONF - ESCAPE_CONF (rw) register accessor: Escape character configuration
- ESC_
CONF - ESC_CONF (rw) register accessor: Escape sequence configuration register %s
- HUNG_
CONF - HUNG_CONF (rw) register accessor: Timeout configuration
- INT_CLR
- INT_CLR (w) register accessor: Interrupt clear bits
- INT_ENA
- INT_ENA (rw) register accessor: Interrupt enable bits
- INT_RAW
- INT_RAW (rw) register accessor: Raw interrupt status
- INT_ST
- INT_ST (r) register accessor: Masked interrupt status
- PKT_
THRES - PKT_THRES (rw) register accessor: Configure register for packet length
- QUICK_
SENT - QUICK_SENT (rw) register accessor: UHCI quick send configuration register
- RX_HEAD
- RX_HEAD (r) register accessor: UHCI packet header register
- STATE0
- STATE0 (r) register accessor: UHCI receive status
- STATE1
- STATE1 (r) register accessor: UHCI transmit status