pub struct ASSIST_DEBUG { /* private fields */ }
Expand description
Debug Assist
Implementations§
Source§impl ASSIST_DEBUG
impl ASSIST_DEBUG
Sourcepub const PTR: *const RegisterBlock = {0x600ce000 as *const assist_debug::RegisterBlock}
pub const PTR: *const RegisterBlock = {0x600ce000 as *const assist_debug::RegisterBlock}
Pointer to the register block
Sourcepub const fn ptr() -> *const RegisterBlock
pub const fn ptr() -> *const RegisterBlock
Return the pointer to the register block
Sourcepub unsafe fn steal() -> Self
pub unsafe fn steal() -> Self
Steal an instance of this peripheral
§Safety
Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.
Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.
Methods from Deref<Target = RegisterBlock>§
Sourcepub fn core_0_montr_ena(&self) -> &CORE_0_MONTR_ENA
pub fn core_0_montr_ena(&self) -> &CORE_0_MONTR_ENA
0x00 - core0 monitor enable configuration register
Sourcepub fn core_0_intr_raw(&self) -> &CORE_0_INTR_RAW
pub fn core_0_intr_raw(&self) -> &CORE_0_INTR_RAW
0x04 - core0 monitor interrupt status register
Sourcepub fn core_0_intr_ena(&self) -> &CORE_0_INTR_ENA
pub fn core_0_intr_ena(&self) -> &CORE_0_INTR_ENA
0x08 - core0 monitor interrupt enable register
Sourcepub fn core_0_intr_clr(&self) -> &CORE_0_INTR_CLR
pub fn core_0_intr_clr(&self) -> &CORE_0_INTR_CLR
0x0c - core0 monitor interrupt clr register
Sourcepub fn core_0_area_dram0_0_min(&self) -> &CORE_0_AREA_DRAM0_0_MIN
pub fn core_0_area_dram0_0_min(&self) -> &CORE_0_AREA_DRAM0_0_MIN
0x10 - core0 dram0 region0 addr configuration register
Sourcepub fn core_0_area_dram0_0_max(&self) -> &CORE_0_AREA_DRAM0_0_MAX
pub fn core_0_area_dram0_0_max(&self) -> &CORE_0_AREA_DRAM0_0_MAX
0x14 - core0 dram0 region0 addr configuration register
Sourcepub fn core_0_area_dram0_1_min(&self) -> &CORE_0_AREA_DRAM0_1_MIN
pub fn core_0_area_dram0_1_min(&self) -> &CORE_0_AREA_DRAM0_1_MIN
0x18 - core0 dram0 region1 addr configuration register
Sourcepub fn core_0_area_dram0_1_max(&self) -> &CORE_0_AREA_DRAM0_1_MAX
pub fn core_0_area_dram0_1_max(&self) -> &CORE_0_AREA_DRAM0_1_MAX
0x1c - core0 dram0 region1 addr configuration register
Sourcepub fn core_0_area_pif_0_min(&self) -> &CORE_0_AREA_PIF_0_MIN
pub fn core_0_area_pif_0_min(&self) -> &CORE_0_AREA_PIF_0_MIN
0x20 - core0 PIF region0 addr configuration register
Sourcepub fn core_0_area_pif_0_max(&self) -> &CORE_0_AREA_PIF_0_MAX
pub fn core_0_area_pif_0_max(&self) -> &CORE_0_AREA_PIF_0_MAX
0x24 - core0 PIF region0 addr configuration register
Sourcepub fn core_0_area_pif_1_min(&self) -> &CORE_0_AREA_PIF_1_MIN
pub fn core_0_area_pif_1_min(&self) -> &CORE_0_AREA_PIF_1_MIN
0x28 - core0 PIF region1 addr configuration register
Sourcepub fn core_0_area_pif_1_max(&self) -> &CORE_0_AREA_PIF_1_MAX
pub fn core_0_area_pif_1_max(&self) -> &CORE_0_AREA_PIF_1_MAX
0x2c - core0 PIF region1 addr configuration register
Sourcepub fn core_0_area_sp(&self) -> &CORE_0_AREA_SP
pub fn core_0_area_sp(&self) -> &CORE_0_AREA_SP
0x30 - core0 area sp status register
Sourcepub fn core_0_area_pc(&self) -> &CORE_0_AREA_PC
pub fn core_0_area_pc(&self) -> &CORE_0_AREA_PC
0x34 - core0 area pc status register
Sourcepub fn core_0_sp_unstable(&self) -> &CORE_0_SP_UNSTABLE
pub fn core_0_sp_unstable(&self) -> &CORE_0_SP_UNSTABLE
0x38 - core0 sp unstable configuration register
Sourcepub fn core_0_sp_min(&self) -> &CORE_0_SP_MIN
pub fn core_0_sp_min(&self) -> &CORE_0_SP_MIN
0x3c - core0 sp region configuration regsiter
Sourcepub fn core_0_sp_max(&self) -> &CORE_0_SP_MAX
pub fn core_0_sp_max(&self) -> &CORE_0_SP_MAX
0x40 - core0 sp region configuration regsiter
Sourcepub fn core_0_sp_pc(&self) -> &CORE_0_SP_PC
pub fn core_0_sp_pc(&self) -> &CORE_0_SP_PC
0x44 - core0 sp pc status register
Sourcepub fn core_0_rcd_pdebugenable(&self) -> &CORE_0_RCD_PDEBUGENABLE
pub fn core_0_rcd_pdebugenable(&self) -> &CORE_0_RCD_PDEBUGENABLE
0x48 - core0 pdebug configuration register
Sourcepub fn core_0_rcd_recording(&self) -> &CORE_0_RCD_RECORDING
pub fn core_0_rcd_recording(&self) -> &CORE_0_RCD_RECORDING
0x4c - core0 pdebug status register
Sourcepub fn core_0_rcd_pdebuginst(&self) -> &CORE_0_RCD_PDEBUGINST
pub fn core_0_rcd_pdebuginst(&self) -> &CORE_0_RCD_PDEBUGINST
0x50 - core0 pdebug status register
Sourcepub fn core_0_rcd_pdebugstatus(&self) -> &CORE_0_RCD_PDEBUGSTATUS
pub fn core_0_rcd_pdebugstatus(&self) -> &CORE_0_RCD_PDEBUGSTATUS
0x54 - core0 pdebug status register
Sourcepub fn core_0_rcd_pdebugdata(&self) -> &CORE_0_RCD_PDEBUGDATA
pub fn core_0_rcd_pdebugdata(&self) -> &CORE_0_RCD_PDEBUGDATA
0x58 - core0 pdebug status register
Sourcepub fn core_0_rcd_pdebugpc(&self) -> &CORE_0_RCD_PDEBUGPC
pub fn core_0_rcd_pdebugpc(&self) -> &CORE_0_RCD_PDEBUGPC
0x5c - core0 pdebug status register
Sourcepub fn core_0_rcd_pdebugls0stat(&self) -> &CORE_0_RCD_PDEBUGLS0STAT
pub fn core_0_rcd_pdebugls0stat(&self) -> &CORE_0_RCD_PDEBUGLS0STAT
0x60 - core0 pdebug status register
Sourcepub fn core_0_rcd_pdebugls0addr(&self) -> &CORE_0_RCD_PDEBUGLS0ADDR
pub fn core_0_rcd_pdebugls0addr(&self) -> &CORE_0_RCD_PDEBUGLS0ADDR
0x64 - core0 pdebug status register
Sourcepub fn core_0_rcd_pdebugls0data(&self) -> &CORE_0_RCD_PDEBUGLS0DATA
pub fn core_0_rcd_pdebugls0data(&self) -> &CORE_0_RCD_PDEBUGLS0DATA
0x68 - core0 pdebug status register
Sourcepub fn core_0_rcd_sp(&self) -> &CORE_0_RCD_SP
pub fn core_0_rcd_sp(&self) -> &CORE_0_RCD_SP
0x6c - core0 pdebug status register
Sourcepub fn core_0_iram0_exception_monitor_0(
&self,
) -> &CORE_0_IRAM0_EXCEPTION_MONITOR_0
pub fn core_0_iram0_exception_monitor_0( &self, ) -> &CORE_0_IRAM0_EXCEPTION_MONITOR_0
0x70 - core0 bus busy status regsiter
Sourcepub fn core_0_iram0_exception_monitor_1(
&self,
) -> &CORE_0_IRAM0_EXCEPTION_MONITOR_1
pub fn core_0_iram0_exception_monitor_1( &self, ) -> &CORE_0_IRAM0_EXCEPTION_MONITOR_1
0x74 - core0 bus busy status regsiter
Sourcepub fn core_0_dram0_exception_monitor_0(
&self,
) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_0
pub fn core_0_dram0_exception_monitor_0( &self, ) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_0
0x78 - core0 bus busy status regsiter
Sourcepub fn core_0_dram0_exception_monitor_1(
&self,
) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_1
pub fn core_0_dram0_exception_monitor_1( &self, ) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_1
0x7c - core0 bus busy status regsiter
Sourcepub fn core_0_dram0_exception_monitor_2(
&self,
) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_2
pub fn core_0_dram0_exception_monitor_2( &self, ) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_2
0x80 - core0 bus busy status regsiter
Sourcepub fn core_0_dram0_exception_monitor_3(
&self,
) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_3
pub fn core_0_dram0_exception_monitor_3( &self, ) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_3
0x84 - core0 bus busy status regsiter
Sourcepub fn core_0_dram0_exception_monitor_4(
&self,
) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_4
pub fn core_0_dram0_exception_monitor_4( &self, ) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_4
0x88 - core0 bus busy configuration regsiter
Sourcepub fn core_0_dram0_exception_monitor_5(
&self,
) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_5
pub fn core_0_dram0_exception_monitor_5( &self, ) -> &CORE_0_DRAM0_EXCEPTION_MONITOR_5
0x8c - core0 bus busy configuration regsiter
Sourcepub fn core_1_montr_ena(&self) -> &CORE_1_MONTR_ENA
pub fn core_1_montr_ena(&self) -> &CORE_1_MONTR_ENA
0x90 - Core1 monitor enable configuration register
Sourcepub fn core_1_intr_raw(&self) -> &CORE_1_INTR_RAW
pub fn core_1_intr_raw(&self) -> &CORE_1_INTR_RAW
0x94 - Core1 monitor interrupt status register
Sourcepub fn core_1_intr_ena(&self) -> &CORE_1_INTR_ENA
pub fn core_1_intr_ena(&self) -> &CORE_1_INTR_ENA
0x98 - Core1 monitor interrupt enable register
Sourcepub fn core_1_intr_clr(&self) -> &CORE_1_INTR_CLR
pub fn core_1_intr_clr(&self) -> &CORE_1_INTR_CLR
0x9c - Core1 monitor interrupt clr register
Sourcepub fn core_1_area_dram0_0_min(&self) -> &CORE_1_AREA_DRAM0_0_MIN
pub fn core_1_area_dram0_0_min(&self) -> &CORE_1_AREA_DRAM0_0_MIN
0xa0 - Core1 dram0 region0 addr configuration register
Sourcepub fn core_1_area_dram0_0_max(&self) -> &CORE_1_AREA_DRAM0_0_MAX
pub fn core_1_area_dram0_0_max(&self) -> &CORE_1_AREA_DRAM0_0_MAX
0xa4 - Core1 dram0 region0 addr configuration register
Sourcepub fn core_1_area_dram0_1_min(&self) -> &CORE_1_AREA_DRAM0_1_MIN
pub fn core_1_area_dram0_1_min(&self) -> &CORE_1_AREA_DRAM0_1_MIN
0xa8 - Core1 dram0 region1 addr configuration register
Sourcepub fn core_1_area_dram0_1_max(&self) -> &CORE_1_AREA_DRAM0_1_MAX
pub fn core_1_area_dram0_1_max(&self) -> &CORE_1_AREA_DRAM0_1_MAX
0xac - Core1 dram0 region1 addr configuration register
Sourcepub fn core_1_area_pif_0_min(&self) -> &CORE_1_AREA_PIF_0_MIN
pub fn core_1_area_pif_0_min(&self) -> &CORE_1_AREA_PIF_0_MIN
0xb0 - Core1 PIF region0 addr configuration register
Sourcepub fn core_1_area_pif_0_max(&self) -> &CORE_1_AREA_PIF_0_MAX
pub fn core_1_area_pif_0_max(&self) -> &CORE_1_AREA_PIF_0_MAX
0xb4 - Core1 PIF region0 addr configuration register
Sourcepub fn core_1_area_pif_1_min(&self) -> &CORE_1_AREA_PIF_1_MIN
pub fn core_1_area_pif_1_min(&self) -> &CORE_1_AREA_PIF_1_MIN
0xb8 - Core1 PIF region1 addr configuration register
Sourcepub fn core_1_area_pif_1_max(&self) -> &CORE_1_AREA_PIF_1_MAX
pub fn core_1_area_pif_1_max(&self) -> &CORE_1_AREA_PIF_1_MAX
0xbc - Core1 PIF region1 addr configuration register
Sourcepub fn core_1_area_pc(&self) -> &CORE_1_AREA_PC
pub fn core_1_area_pc(&self) -> &CORE_1_AREA_PC
0xc0 - Core1 area sp status register
Sourcepub fn core_1_area_sp(&self) -> &CORE_1_AREA_SP
pub fn core_1_area_sp(&self) -> &CORE_1_AREA_SP
0xc4 - Core1 area pc status register
Sourcepub fn core_1_sp_unstable(&self) -> &CORE_1_SP_UNSTABLE
pub fn core_1_sp_unstable(&self) -> &CORE_1_SP_UNSTABLE
0xc8 - Core1 sp unstable configuration register
Sourcepub fn core_1_sp_min(&self) -> &CORE_1_SP_MIN
pub fn core_1_sp_min(&self) -> &CORE_1_SP_MIN
0xcc - Core1 sp region configuration regsiter
Sourcepub fn core_1_sp_max(&self) -> &CORE_1_SP_MAX
pub fn core_1_sp_max(&self) -> &CORE_1_SP_MAX
0xd0 - Core1 sp region configuration regsiter
Sourcepub fn core_1_sp_pc(&self) -> &CORE_1_SP_PC
pub fn core_1_sp_pc(&self) -> &CORE_1_SP_PC
0xd4 - Core1 sp pc status register
Sourcepub fn core_1_rcd_pdebugenable(&self) -> &CORE_1_RCD_PDEBUGENABLE
pub fn core_1_rcd_pdebugenable(&self) -> &CORE_1_RCD_PDEBUGENABLE
0xd8 - Core1 pdebug configuration register
Sourcepub fn core_1_rcd_recording(&self) -> &CORE_1_RCD_RECORDING
pub fn core_1_rcd_recording(&self) -> &CORE_1_RCD_RECORDING
0xdc - Core1 pdebug status register
Sourcepub fn core_1_rcd_pdebuginst(&self) -> &CORE_1_RCD_PDEBUGINST
pub fn core_1_rcd_pdebuginst(&self) -> &CORE_1_RCD_PDEBUGINST
0xe0 - Core1 pdebug status register
Sourcepub fn core_1_rcd_pdebugstatus(&self) -> &CORE_1_RCD_PDEBUGSTATUS
pub fn core_1_rcd_pdebugstatus(&self) -> &CORE_1_RCD_PDEBUGSTATUS
0xe4 - Core1 pdebug status register
Sourcepub fn core_1_rcd_pdebugdata(&self) -> &CORE_1_RCD_PDEBUGDATA
pub fn core_1_rcd_pdebugdata(&self) -> &CORE_1_RCD_PDEBUGDATA
0xe8 - Core1 pdebug status register
Sourcepub fn core_1_rcd_pdebugpc(&self) -> &CORE_1_RCD_PDEBUGPC
pub fn core_1_rcd_pdebugpc(&self) -> &CORE_1_RCD_PDEBUGPC
0xec - Core1 pdebug status register
Sourcepub fn core_1_rcd_pdebugls0stat(&self) -> &CORE_1_RCD_PDEBUGLS0STAT
pub fn core_1_rcd_pdebugls0stat(&self) -> &CORE_1_RCD_PDEBUGLS0STAT
0xf0 - Core1 pdebug status register
Sourcepub fn core_1_rcd_pdebugls0addr(&self) -> &CORE_1_RCD_PDEBUGLS0ADDR
pub fn core_1_rcd_pdebugls0addr(&self) -> &CORE_1_RCD_PDEBUGLS0ADDR
0xf4 - Core1 pdebug status register
Sourcepub fn core_1_rcd_pdebugls0data(&self) -> &CORE_1_RCD_PDEBUGLS0DATA
pub fn core_1_rcd_pdebugls0data(&self) -> &CORE_1_RCD_PDEBUGLS0DATA
0xf8 - Core1 pdebug status register
Sourcepub fn core_1_rcd_sp(&self) -> &CORE_1_RCD_SP
pub fn core_1_rcd_sp(&self) -> &CORE_1_RCD_SP
0xfc - Core1 pdebug status register
Sourcepub fn core_1_iram0_exception_monitor_0(
&self,
) -> &CORE_1_IRAM0_EXCEPTION_MONITOR_0
pub fn core_1_iram0_exception_monitor_0( &self, ) -> &CORE_1_IRAM0_EXCEPTION_MONITOR_0
0x100 - Core1 bus busy status regsiter
Sourcepub fn core_1_iram0_exception_monitor_1(
&self,
) -> &CORE_1_IRAM0_EXCEPTION_MONITOR_1
pub fn core_1_iram0_exception_monitor_1( &self, ) -> &CORE_1_IRAM0_EXCEPTION_MONITOR_1
0x104 - Core1 bus busy status regsiter
Sourcepub fn core_1_dram0_exception_monitor_0(
&self,
) -> &CORE_1_DRAM0_EXCEPTION_MONITOR_0
pub fn core_1_dram0_exception_monitor_0( &self, ) -> &CORE_1_DRAM0_EXCEPTION_MONITOR_0
0x108 - Core1 bus busy status regsiter
Sourcepub fn core_1_dram0_exception_monitor_1(
&self,
) -> &CORE_1_DRAM0_EXCEPTION_MONITOR_1
pub fn core_1_dram0_exception_monitor_1( &self, ) -> &CORE_1_DRAM0_EXCEPTION_MONITOR_1
0x10c - Core1 bus busy status regsiter
Sourcepub fn core_1_dram0_exception_monitor_2(
&self,
) -> &CORE_1_DRAM0_EXCEPTION_MONITOR_2
pub fn core_1_dram0_exception_monitor_2( &self, ) -> &CORE_1_DRAM0_EXCEPTION_MONITOR_2
0x110 - Core1 bus busy status regsiter
Sourcepub fn core_1_dram0_exception_monitor_3(
&self,
) -> &CORE_1_DRAM0_EXCEPTION_MONITOR_3
pub fn core_1_dram0_exception_monitor_3( &self, ) -> &CORE_1_DRAM0_EXCEPTION_MONITOR_3
0x114 - Core1 bus busy status regsiter
Sourcepub fn core_1_dram0_exception_monitor_4(
&self,
) -> &CORE_1_DRAM0_EXCEPTION_MONITOR_4
pub fn core_1_dram0_exception_monitor_4( &self, ) -> &CORE_1_DRAM0_EXCEPTION_MONITOR_4
0x118 - Core1 bus busy status regsiter
Sourcepub fn core_1_dram0_exception_monitor_5(
&self,
) -> &CORE_1_DRAM0_EXCEPTION_MONITOR_5
pub fn core_1_dram0_exception_monitor_5( &self, ) -> &CORE_1_DRAM0_EXCEPTION_MONITOR_5
0x11c - Core1 bus busy status regsiter
Sourcepub fn core_x_iram0_dram0_exception_monitor_0(
&self,
) -> &CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0
pub fn core_x_iram0_dram0_exception_monitor_0( &self, ) -> &CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_0
0x120 - bus busy configuration register
Sourcepub fn core_x_iram0_dram0_exception_monitor_1(
&self,
) -> &CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1
pub fn core_x_iram0_dram0_exception_monitor_1( &self, ) -> &CORE_X_IRAM0_DRAM0_EXCEPTION_MONITOR_1
0x124 - bus busy configuration register
Sourcepub fn log_setting(&self) -> &LOG_SETTING
pub fn log_setting(&self) -> &LOG_SETTING
0x128 - log set register
Sourcepub fn log_data_0(&self) -> &LOG_DATA_0
pub fn log_data_0(&self) -> &LOG_DATA_0
0x12c - log check data register
Sourcepub fn log_data_1(&self) -> &LOG_DATA_1
pub fn log_data_1(&self) -> &LOG_DATA_1
0x130 - log check data register
Sourcepub fn log_data_2(&self) -> &LOG_DATA_2
pub fn log_data_2(&self) -> &LOG_DATA_2
0x134 - log check data register
Sourcepub fn log_data_3(&self) -> &LOG_DATA_3
pub fn log_data_3(&self) -> &LOG_DATA_3
0x138 - log check data register
Sourcepub fn log_data_mask(&self) -> &LOG_DATA_MASK
pub fn log_data_mask(&self) -> &LOG_DATA_MASK
0x13c - log check data mask register
Sourcepub fn log_mem_start(&self) -> &LOG_MEM_START
pub fn log_mem_start(&self) -> &LOG_MEM_START
0x148 - log mem region configuration register
Sourcepub fn log_mem_end(&self) -> &LOG_MEM_END
pub fn log_mem_end(&self) -> &LOG_MEM_END
0x14c - log mem region configuration register
Sourcepub fn log_mem_writing_addr(&self) -> &LOG_MEM_WRITING_ADDR
pub fn log_mem_writing_addr(&self) -> &LOG_MEM_WRITING_ADDR
0x150 - log mem addr status register
Sourcepub fn log_mem_full_flag(&self) -> &LOG_MEM_FULL_FLAG
pub fn log_mem_full_flag(&self) -> &LOG_MEM_FULL_FLAG
0x154 - log mem status register