Struct esp32s3::sensitive::core_0_pif_pms_constrain_0::R
source · pub struct R(_);
Expand description
Register CORE_0_PIF_PMS_CONSTRAIN_0
reader
Implementations§
source§impl R
impl R
sourcepub fn core_0_pif_pms_constrain_lock(&self) -> CORE_0_PIF_PMS_CONSTRAIN_LOCK_R
pub fn core_0_pif_pms_constrain_lock(&self) -> CORE_0_PIF_PMS_CONSTRAIN_LOCK_R
Bit 0 - Set 1 to lock core0 access peripherals permission Configuration Register.