Struct esp32s3::spi1::ctrl1::R

pub struct R(_);

Register CTRL1 reader

Implementations

impl R

pub fn clk_mode(&self) -> CLK_MODE_R

Bits 0:1 - SPI Bus clock (SPI_CLK) mode bits. 0: SPI Bus clock (SPI_CLK) is off when CS inactive 1: SPI_CLK is delayed one cycle after SPI_CS inactive 2: SPI_CLK is delayed two cycles after SPI_CS inactive 3: SPI_CLK is always on.

pub fn cs_hold_dly_res(&self) -> CS_HOLD_DLY_RES_R

Bits 2:11 - After RES/DP/HPM/PES/PER command is sent, SPI1 may waits (SPI_MEM_CS_HOLD_DELAY_RES[9:0] * 4 or * 256) SPI_CLK cycles.

Methods from Deref<Target = R<CTRL1_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<CTRL1_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<CTRL1_SPEC>> for R

fn from(reader: R<CTRL1_SPEC>) -> Self

Converts to this type from the input type.