pub struct W(_);
Expand description
Register CTRL2
writer
Implementations
sourceimpl W
impl W
sourcepub fn cs_setup_time(&mut self) -> CS_SETUP_TIME_W<'_, 0>
pub fn cs_setup_time(&mut self) -> CS_SETUP_TIME_W<'_, 0>
Bits 0:4 - (cycles-1) of PREP phase by SPI_CLK, which is the SPI_CS setup time. These bits are combined with SPI_MEM_CS_SETUP bit.
sourcepub fn cs_hold_time(&mut self) -> CS_HOLD_TIME_W<'_, 5>
pub fn cs_hold_time(&mut self) -> CS_HOLD_TIME_W<'_, 5>
Bits 5:9 - SPI Bus CS (SPI_CS) signal is delayed to inactive by SPI Bus clock (SPI_CLK), which is the SPI_CS hold time in non-ECC mode. These bits are combined with SPI_MEM_CS_HOLD bit.
sourcepub fn ecc_cs_hold_time(&mut self) -> ECC_CS_HOLD_TIME_W<'_, 10>
pub fn ecc_cs_hold_time(&mut self) -> ECC_CS_HOLD_TIME_W<'_, 10>
Bits 10:12 - SPI_MEM_CS_HOLD_TIME + SPI_MEM_ECC_CS_HOLD_TIME is the SPI_CS hold cycle in ECC mode when accessed flash.
sourcepub fn ecc_skip_page_corner(&mut self) -> ECC_SKIP_PAGE_CORNER_W<'_, 13>
pub fn ecc_skip_page_corner(&mut self) -> ECC_SKIP_PAGE_CORNER_W<'_, 13>
Bit 13 - 1: MSPI skips page corner when accesses flash. 0: Not skip page corner when accesses flash.
sourcepub fn ecc_16to18_byte_en(&mut self) -> ECC_16TO18_BYTE_EN_W<'_, 14>
pub fn ecc_16to18_byte_en(&mut self) -> ECC_16TO18_BYTE_EN_W<'_, 14>
Bit 14 - Set this bit to enable MSPI ECC 16 bytes data with 2 ECC bytes mode when accesses flash.
sourcepub fn cs_hold_delay(&mut self) -> CS_HOLD_DELAY_W<'_, 25>
pub fn cs_hold_delay(&mut self) -> CS_HOLD_DELAY_W<'_, 25>
Bits 25:30 - These bits are used to set the minimum CS high time tSHSL between SPI burst transfer when accesses to flash. tSHSL is (SPI_MEM_CS_HOLD_DELAY[5:0] + 1) MSPI core clock cycles.
sourcepub fn sync_reset(&mut self) -> SYNC_RESET_W<'_, 31>
pub fn sync_reset(&mut self) -> SYNC_RESET_W<'_, 31>
Bit 31 - The FSM will be reset.