Struct esp32s3::spi0::ctrl::W

source ·
pub struct W(_);
Expand description

Register CTRL writer

Implementations

Bit 3 - In the DUMMY phase the signal level of SPI bus is output by the SPI0 controller.

Bit 4 - Set this bit to enable 8-bit-mode(8-bm) in DOUT phase.

Bit 5 - Set this bit to enable 8-bit-mode(8-bm) in DIN phase.

Bit 6 - Set this bit to enable 8-bit-mode(8-bm) in ADDR phase.

Bit 7 - Set this bit to enable 2-bit-mode(2-bm) in CMD phase.

Bit 8 - Set this bit to enable 4-bit-mode(4-bm) in CMD phase.

Bit 9 - Set this bit to enable 8-bit-mode(8-bm) in CMD phase.

Bit 13 - This bit should be set when SPI_MEM_FREAD_QIO, SPI_MEM_FREAD_DIO, SPI_MEM_FREAD_QUAD or SPI_MEM_FREAD_DUAL is set.

Bit 14 - In hardware 0x3B read operation, DIN phase apply 2 signals. 1: enable 0: disable.

Bit 18 - The bit is used to set MISO line polarity, 1: high 0, low

Bit 19 - The bit is used to set MOSI line polarity, 1: high 0, low

Bit 20 - In hardware 0x6B read operation, DIN phase apply 4 signals(4-bit-mode). 1: enable 0: disable.

Bit 21 - Write protect signal output when SPI is idle. 1: output high, 0: output low.

Bit 23 - In hardware 0xBB read operation, ADDR phase and DIN phase apply 2 signals(2-bit-mode). 1: enable 0: disable.

Bit 24 - In hardware 0xEB read operation, ADDR phase and DIN phase apply 4 signals(4-bit-mode). 1: enable 0: disable.

Writes raw bits to the register.

Methods from Deref<Target = W<CTRL_SPEC>>

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

The resulting type after dereferencing.
Dereferences the value.
Mutably dereferences the value.
Converts to this type from the input type.

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That is, this conversion is whatever the implementation of From<T> for U chooses to do.

The type returned in the event of a conversion error.
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The type returned in the event of a conversion error.
Performs the conversion.