Struct esp32s3::extmem::icache_autoload_ctrl::R

pub struct R(_);

Register ICACHE_AUTOLOAD_CTRL reader

Implementations

impl R

pub fn icache_autoload_sct0_ena(&self) -> ICACHE_AUTOLOAD_SCT0_ENA_R

Bit 0 - The bits are used to enable the first section for autoload operation.

pub fn icache_autoload_sct1_ena(&self) -> ICACHE_AUTOLOAD_SCT1_ENA_R

Bit 1 - The bits are used to enable the second section for autoload operation.

pub fn icache_autoload_ena(&self) -> ICACHE_AUTOLOAD_ENA_R

Bit 2 - The bit is used to enable and disable autoload operation. It is combined with icache_autoload_done. 1: enable, 0: disable.

pub fn icache_autoload_done(&self) -> ICACHE_AUTOLOAD_DONE_R

Bit 3 - The bit is used to indicate autoload operation is finished.

pub fn icache_autoload_order(&self) -> ICACHE_AUTOLOAD_ORDER_R

Bit 4 - The bits are used to configure the direction of autoload. 1: descending, 0: ascending.

pub fn icache_autoload_rqst(&self) -> ICACHE_AUTOLOAD_RQST_R

Bits 5:6 - The bits are used to configure trigger conditions for autoload. 0/3: cache miss, 1: cache hit, 2: both cache miss and hit.

pub fn icache_autoload_size(&self) -> ICACHE_AUTOLOAD_SIZE_R

Bits 7:8 - The bits are used to configure the numbers of the cache block for the issuing autoload operation.

pub fn icache_autoload_buffer_clear(&self) -> ICACHE_AUTOLOAD_BUFFER_CLEAR_R

Bit 9 - The bit is used to clear autoload buffer in icache.

Methods from Deref<Target = R<ICACHE_AUTOLOAD_CTRL_SPEC>>

pub fn bits(&self) -> REG::Ux

Reads raw bits from register.

Trait Implementations

impl Deref for R

type Target = R<ICACHE_AUTOLOAD_CTRL_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl From<R<ICACHE_AUTOLOAD_CTRL_SPEC>> for R

fn from(reader: R<ICACHE_AUTOLOAD_CTRL_SPEC>) -> Self

Converts to this type from the input type.