Module esp32s3::extmem::dcache_ctrl1

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******* Description ***********

Structs

DCACHE_CTRL1_SPEC
******* Description ***********
R
Register DCACHE_CTRL1 reader
W
Register DCACHE_CTRL1 writer

Type Definitions

DCACHE_SHUT_CORE0_BUS_R
Field DCACHE_SHUT_CORE0_BUS reader - The bit is used to disable core0 dbus, 0: enable, 1: disable
DCACHE_SHUT_CORE0_BUS_W
Field DCACHE_SHUT_CORE0_BUS writer - The bit is used to disable core0 dbus, 0: enable, 1: disable
DCACHE_SHUT_CORE1_BUS_R
Field DCACHE_SHUT_CORE1_BUS reader - The bit is used to disable core1 dbus, 0: enable, 1: disable
DCACHE_SHUT_CORE1_BUS_W
Field DCACHE_SHUT_CORE1_BUS writer - The bit is used to disable core1 dbus, 0: enable, 1: disable