Struct esp32s3::spi0::sram_clk::SRAM_CLK_SPEC

pub struct SRAM_CLK_SPEC;

SPI_CLK clock division register when SPI0 accesses to Ext_RAM.

This register you can read, write_with_zero, reset, write, modify. See API.

For information about available fields see sram_clk module

Trait Implementations

impl Readable for SRAM_CLK_SPEC

read() method returns sram_clk::R reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for SRAM_CLK_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for SRAM_CLK_SPEC

reset() method sets SRAM_CLK to value 0x0003_0103

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for SRAM_CLK_SPEC

write(|w| ..) method takes sram_clk::W writer structure

type Writer = W

Writer type argument to write, et al.