Struct esp32s3::lcd_cam::lcd_dly_mode::W
source · pub struct W(_);
Expand description
Register LCD_DLY_MODE
writer
Implementations
sourceimpl W
impl W
sourcepub fn lcd_cd_mode(&mut self) -> LCD_CD_MODE_W<'_, 0>
pub fn lcd_cd_mode(&mut self) -> LCD_CD_MODE_W<'_, 0>
Bits 0:1 - The output LCD_CD is delayed by module clock LCD_CLK. 0: output without delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of LCD_CLK.
sourcepub fn lcd_de_mode(&mut self) -> LCD_DE_MODE_W<'_, 2>
pub fn lcd_de_mode(&mut self) -> LCD_DE_MODE_W<'_, 2>
Bits 2:3 - The output LCD_DE is delayed by module clock LCD_CLK. 0: output without delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of LCD_CLK.
sourcepub fn lcd_hsync_mode(&mut self) -> LCD_HSYNC_MODE_W<'_, 4>
pub fn lcd_hsync_mode(&mut self) -> LCD_HSYNC_MODE_W<'_, 4>
Bits 4:5 - The output LCD_HSYNC is delayed by module clock LCD_CLK. 0: output without delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of LCD_CLK.
sourcepub fn lcd_vsync_mode(&mut self) -> LCD_VSYNC_MODE_W<'_, 6>
pub fn lcd_vsync_mode(&mut self) -> LCD_VSYNC_MODE_W<'_, 6>
Bits 6:7 - The output LCD_VSYNC is delayed by module clock LCD_CLK. 0: output without delayed. 1: delay by the positive edge of LCD_CLK. 2: delay by the negative edge of LCD_CLK.
Methods from Deref<Target = W<LCD_DLY_MODE_SPEC>>
Trait Implementations
sourceimpl From<W<LCD_DLY_MODE_SPEC>> for W
impl From<W<LCD_DLY_MODE_SPEC>> for W
sourcefn from(writer: W<LCD_DLY_MODE_SPEC>) -> Self
fn from(writer: W<LCD_DLY_MODE_SPEC>) -> Self
Converts to this type from the input type.
Auto Trait Implementations
Blanket Implementations
sourceimpl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more