Module esp32s3::extmem::core1_acs_cache_int_st

******* Description ***********

Structs

CORE1_ACS_CACHE_INT_ST_SPEC

******* Description ***********

R

Register CORE1_ACS_CACHE_INT_ST reader

Type Definitions

CORE1_DBUS_ACS_MSK_DCACHE_ST_R

Field CORE1_DBUS_ACS_MSK_DCACHE_ST reader - The bit is used to indicate interrupt by cpu access dcache while the core1_dbus is disabled or dcache is disabled which include speculative access.

CORE1_DBUS_REJECT_ST_R

Field CORE1_DBUS_REJECT_ST reader - The bit is used to indicate interrupt by authentication fail.

CORE1_IBUS_ACS_MSK_ICACHE_ST_R

Field CORE1_IBUS_ACS_MSK_ICACHE_ST reader - The bit is used to indicate interrupt by cpu access icache while the core1_ibus is disabled or icache is disabled which include speculative access.

CORE1_IBUS_REJECT_ST_R

Field CORE1_IBUS_REJECT_ST reader - The bit is used to indicate interrupt by authentication fail.

CORE1_IBUS_WR_ICACHE_ST_R

Field CORE1_IBUS_WR_ICACHE_ST reader - The bit is used to indicate interrupt by ibus trying to write icache