Module esp32s3::dma::in_conf0_ch

Configure 0 register of Rx channel 0

Structs

IN_CONF0_CH_SPEC

Configure 0 register of Rx channel 0

R

Register IN_CONF0_CH%s reader

W

Register IN_CONF0_CH%s writer

Type Definitions

INDSCR_BURST_EN_CH_R

Field INDSCR_BURST_EN_CH reader - Set this bit to 1 to enable INCR burst transfer for Rx channel 0 reading link descriptor when accessing internal SRAM.

INDSCR_BURST_EN_CH_W

Field INDSCR_BURST_EN_CH writer - Set this bit to 1 to enable INCR burst transfer for Rx channel 0 reading link descriptor when accessing internal SRAM.

IN_DATA_BURST_EN_CH_R

Field IN_DATA_BURST_EN_CH reader - Set this bit to 1 to enable INCR burst transfer for Rx channel 0 receiving data when accessing internal SRAM.

IN_DATA_BURST_EN_CH_W

Field IN_DATA_BURST_EN_CH writer - Set this bit to 1 to enable INCR burst transfer for Rx channel 0 receiving data when accessing internal SRAM.

IN_LOOP_TEST_CH_R

Field IN_LOOP_TEST_CH reader - reserved

IN_LOOP_TEST_CH_W

Field IN_LOOP_TEST_CH writer - reserved

IN_RST_CH_R

Field IN_RST_CH reader - This bit is used to reset DMA channel 0 Rx FSM and Rx FIFO pointer.

IN_RST_CH_W

Field IN_RST_CH writer - This bit is used to reset DMA channel 0 Rx FSM and Rx FIFO pointer.

MEM_TRANS_EN_CH_R

Field MEM_TRANS_EN_CH reader - Set this bit 1 to enable automatic transmitting data from memory to memory via DMA.

MEM_TRANS_EN_CH_W

Field MEM_TRANS_EN_CH writer - Set this bit 1 to enable automatic transmitting data from memory to memory via DMA.