esp32s3/sensitive/
dma_apbperi_aes_pms_constrain_0.rs

1#[doc = "Register `DMA_APBPERI_AES_PMS_CONSTRAIN_0` reader"]
2pub type R = crate::R<DMA_APBPERI_AES_PMS_CONSTRAIN_0_SPEC>;
3#[doc = "Register `DMA_APBPERI_AES_PMS_CONSTRAIN_0` writer"]
4pub type W = crate::W<DMA_APBPERI_AES_PMS_CONSTRAIN_0_SPEC>;
5#[doc = "Field `DMA_APBPERI_AES_PMS_CONSTRAIN_LOCK` reader - Set 1 to lock aes dma permission Configuration Register."]
6pub type DMA_APBPERI_AES_PMS_CONSTRAIN_LOCK_R = crate::BitReader;
7#[doc = "Field `DMA_APBPERI_AES_PMS_CONSTRAIN_LOCK` writer - Set 1 to lock aes dma permission Configuration Register."]
8pub type DMA_APBPERI_AES_PMS_CONSTRAIN_LOCK_W<'a, REG> = crate::BitWriter<'a, REG>;
9impl R {
10    #[doc = "Bit 0 - Set 1 to lock aes dma permission Configuration Register."]
11    #[inline(always)]
12    pub fn dma_apbperi_aes_pms_constrain_lock(&self) -> DMA_APBPERI_AES_PMS_CONSTRAIN_LOCK_R {
13        DMA_APBPERI_AES_PMS_CONSTRAIN_LOCK_R::new((self.bits & 1) != 0)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("DMA_APBPERI_AES_PMS_CONSTRAIN_0")
20            .field(
21                "dma_apbperi_aes_pms_constrain_lock",
22                &self.dma_apbperi_aes_pms_constrain_lock(),
23            )
24            .finish()
25    }
26}
27impl W {
28    #[doc = "Bit 0 - Set 1 to lock aes dma permission Configuration Register."]
29    #[inline(always)]
30    pub fn dma_apbperi_aes_pms_constrain_lock(
31        &mut self,
32    ) -> DMA_APBPERI_AES_PMS_CONSTRAIN_LOCK_W<DMA_APBPERI_AES_PMS_CONSTRAIN_0_SPEC> {
33        DMA_APBPERI_AES_PMS_CONSTRAIN_LOCK_W::new(self, 0)
34    }
35}
36#[doc = "aes dma permission configuration register 0.\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_apbperi_aes_pms_constrain_0::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_apbperi_aes_pms_constrain_0::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
37pub struct DMA_APBPERI_AES_PMS_CONSTRAIN_0_SPEC;
38impl crate::RegisterSpec for DMA_APBPERI_AES_PMS_CONSTRAIN_0_SPEC {
39    type Ux = u32;
40}
41#[doc = "`read()` method returns [`dma_apbperi_aes_pms_constrain_0::R`](R) reader structure"]
42impl crate::Readable for DMA_APBPERI_AES_PMS_CONSTRAIN_0_SPEC {}
43#[doc = "`write(|w| ..)` method takes [`dma_apbperi_aes_pms_constrain_0::W`](W) writer structure"]
44impl crate::Writable for DMA_APBPERI_AES_PMS_CONSTRAIN_0_SPEC {
45    type Safety = crate::Unsafe;
46}
47#[doc = "`reset()` method sets DMA_APBPERI_AES_PMS_CONSTRAIN_0 to value 0"]
48impl crate::Resettable for DMA_APBPERI_AES_PMS_CONSTRAIN_0_SPEC {}
esp32s3/sensitive/dma_apbperi_aes_pms_constrain_0.rs

esp32s3/sensitive/
dma_apbperi_aes_pms_constrain_0.rs
