esp32s3/sensitive/
core_0_region_pms_constrain_6.rs

1#[doc = "Register `CORE_0_REGION_PMS_CONSTRAIN_6` reader"]
2pub type R = crate::R<CORE_0_REGION_PMS_CONSTRAIN_6_SPEC>;
3#[doc = "Register `CORE_0_REGION_PMS_CONSTRAIN_6` writer"]
4pub type W = crate::W<CORE_0_REGION_PMS_CONSTRAIN_6_SPEC>;
5#[doc = "Field `CORE_0_REGION_PMS_CONSTRAIN_ADDR_3` reader - Region 2 end address and Region 3 start address for core0."]
6pub type CORE_0_REGION_PMS_CONSTRAIN_ADDR_3_R = crate::FieldReader<u32>;
7#[doc = "Field `CORE_0_REGION_PMS_CONSTRAIN_ADDR_3` writer - Region 2 end address and Region 3 start address for core0."]
8pub type CORE_0_REGION_PMS_CONSTRAIN_ADDR_3_W<'a, REG> = crate::FieldWriter<'a, REG, 30, u32>;
9impl R {
10    #[doc = "Bits 0:29 - Region 2 end address and Region 3 start address for core0."]
11    #[inline(always)]
12    pub fn core_0_region_pms_constrain_addr_3(&self) -> CORE_0_REGION_PMS_CONSTRAIN_ADDR_3_R {
13        CORE_0_REGION_PMS_CONSTRAIN_ADDR_3_R::new(self.bits & 0x3fff_ffff)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("CORE_0_REGION_PMS_CONSTRAIN_6")
20            .field(
21                "core_0_region_pms_constrain_addr_3",
22                &self.core_0_region_pms_constrain_addr_3(),
23            )
24            .finish()
25    }
26}
27impl W {
28    #[doc = "Bits 0:29 - Region 2 end address and Region 3 start address for core0."]
29    #[inline(always)]
30    pub fn core_0_region_pms_constrain_addr_3(
31        &mut self,
32    ) -> CORE_0_REGION_PMS_CONSTRAIN_ADDR_3_W<CORE_0_REGION_PMS_CONSTRAIN_6_SPEC> {
33        CORE_0_REGION_PMS_CONSTRAIN_ADDR_3_W::new(self, 0)
34    }
35}
36#[doc = "Core0 region permission register 6.\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_region_pms_constrain_6::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_region_pms_constrain_6::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
37pub struct CORE_0_REGION_PMS_CONSTRAIN_6_SPEC;
38impl crate::RegisterSpec for CORE_0_REGION_PMS_CONSTRAIN_6_SPEC {
39    type Ux = u32;
40}
41#[doc = "`read()` method returns [`core_0_region_pms_constrain_6::R`](R) reader structure"]
42impl crate::Readable for CORE_0_REGION_PMS_CONSTRAIN_6_SPEC {}
43#[doc = "`write(|w| ..)` method takes [`core_0_region_pms_constrain_6::W`](W) writer structure"]
44impl crate::Writable for CORE_0_REGION_PMS_CONSTRAIN_6_SPEC {
45    type Safety = crate::Unsafe;
46}
47#[doc = "`reset()` method sets CORE_0_REGION_PMS_CONSTRAIN_6 to value 0"]
48impl crate::Resettable for CORE_0_REGION_PMS_CONSTRAIN_6_SPEC {}
esp32s3/sensitive/core_0_region_pms_constrain_6.rs

esp32s3/sensitive/
core_0_region_pms_constrain_6.rs
