esp32s3/sensitive/
edma_pms_adc_dac.rs1#[doc = "Register `EDMA_PMS_ADC_DAC` reader"]
2pub type R = crate::R<EDMA_PMS_ADC_DAC_SPEC>;
3#[doc = "Register `EDMA_PMS_ADC_DAC` writer"]
4pub type W = crate::W<EDMA_PMS_ADC_DAC_SPEC>;
5#[doc = "Field `ATTR1` reader - This field is used to configure the permission of ADC/DAC accessing address, which is larger than boundary 0 and less than boundary 1, through EDMA. Bit 0: set this bit to enable read permission. Bit 1: set this bit to enable write permission."]
6pub type ATTR1_R = crate::FieldReader;
7#[doc = "Field `ATTR1` writer - This field is used to configure the permission of ADC/DAC accessing address, which is larger than boundary 0 and less than boundary 1, through EDMA. Bit 0: set this bit to enable read permission. Bit 1: set this bit to enable write permission."]
8pub type ATTR1_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `ATTR2` reader - This field is used to configure the permission of ADC/DAC accessing address, which is larger than boundary 1 and less than boundary 2, through EDMA. Bit 0: set this bit to enable read permission. Bit 1: set this bit to enable write permission."]
10pub type ATTR2_R = crate::FieldReader;
11#[doc = "Field `ATTR2` writer - This field is used to configure the permission of ADC/DAC accessing address, which is larger than boundary 1 and less than boundary 2, through EDMA. Bit 0: set this bit to enable read permission. Bit 1: set this bit to enable write permission."]
12pub type ATTR2_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13impl R {
14 #[doc = "Bits 0:1 - This field is used to configure the permission of ADC/DAC accessing address, which is larger than boundary 0 and less than boundary 1, through EDMA. Bit 0: set this bit to enable read permission. Bit 1: set this bit to enable write permission."]
15 #[inline(always)]
16 pub fn attr1(&self) -> ATTR1_R {
17 ATTR1_R::new((self.bits & 3) as u8)
18 }
19 #[doc = "Bits 2:3 - This field is used to configure the permission of ADC/DAC accessing address, which is larger than boundary 1 and less than boundary 2, through EDMA. Bit 0: set this bit to enable read permission. Bit 1: set this bit to enable write permission."]
20 #[inline(always)]
21 pub fn attr2(&self) -> ATTR2_R {
22 ATTR2_R::new(((self.bits >> 2) & 3) as u8)
23 }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28 f.debug_struct("EDMA_PMS_ADC_DAC")
29 .field("attr1", &self.attr1())
30 .field("attr2", &self.attr2())
31 .finish()
32 }
33}
34impl W {
35 #[doc = "Bits 0:1 - This field is used to configure the permission of ADC/DAC accessing address, which is larger than boundary 0 and less than boundary 1, through EDMA. Bit 0: set this bit to enable read permission. Bit 1: set this bit to enable write permission."]
36 #[inline(always)]
37 pub fn attr1(&mut self) -> ATTR1_W<EDMA_PMS_ADC_DAC_SPEC> {
38 ATTR1_W::new(self, 0)
39 }
40 #[doc = "Bits 2:3 - This field is used to configure the permission of ADC/DAC accessing address, which is larger than boundary 1 and less than boundary 2, through EDMA. Bit 0: set this bit to enable read permission. Bit 1: set this bit to enable write permission."]
41 #[inline(always)]
42 pub fn attr2(&mut self) -> ATTR2_W<EDMA_PMS_ADC_DAC_SPEC> {
43 ATTR2_W::new(self, 2)
44 }
45}
46#[doc = "EDMA-ADC/DAC permission control register.\n\nYou can [`read`](crate::Reg::read) this register and get [`edma_pms_adc_dac::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`edma_pms_adc_dac::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
47pub struct EDMA_PMS_ADC_DAC_SPEC;
48impl crate::RegisterSpec for EDMA_PMS_ADC_DAC_SPEC {
49 type Ux = u32;
50}
51#[doc = "`read()` method returns [`edma_pms_adc_dac::R`](R) reader structure"]
52impl crate::Readable for EDMA_PMS_ADC_DAC_SPEC {}
53#[doc = "`write(|w| ..)` method takes [`edma_pms_adc_dac::W`](W) writer structure"]
54impl crate::Writable for EDMA_PMS_ADC_DAC_SPEC {
55 type Safety = crate::Unsafe;
56}
57#[doc = "`reset()` method sets EDMA_PMS_ADC_DAC to value 0x0f"]
58impl crate::Resettable for EDMA_PMS_ADC_DAC_SPEC {
59 const RESET_VALUE: u32 = 0x0f;
60}