esp32s3/wcl/
core_1_nmi_mask_disable.rs1#[doc = "Register `Core_1_NMI_MASK_DISABLE` writer"]
2pub type W = crate::W<CORE_1_NMI_MASK_DISABLE_SPEC>;
3#[doc = "Field `CORE_1_NMI_MASK_DISABLE` writer - this field is used to disable NMI mask, it will not take effect immediately,only when the CPU executes to the trigger address will it start to cancel NMI mask"]
4pub type CORE_1_NMI_MASK_DISABLE_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
5#[cfg(feature = "impl-register-debug")]
6impl core::fmt::Debug for crate::generic::Reg<CORE_1_NMI_MASK_DISABLE_SPEC> {
7 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
8 write!(f, "(not readable)")
9 }
10}
11impl W {
12 #[doc = "Bits 0:31 - this field is used to disable NMI mask, it will not take effect immediately,only when the CPU executes to the trigger address will it start to cancel NMI mask"]
13 #[inline(always)]
14 pub fn core_1_nmi_mask_disable(
15 &mut self,
16 ) -> CORE_1_NMI_MASK_DISABLE_W<CORE_1_NMI_MASK_DISABLE_SPEC> {
17 CORE_1_NMI_MASK_DISABLE_W::new(self, 0)
18 }
19}
20#[doc = "Core_1 NMI mask disable register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_1_nmi_mask_disable::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
21pub struct CORE_1_NMI_MASK_DISABLE_SPEC;
22impl crate::RegisterSpec for CORE_1_NMI_MASK_DISABLE_SPEC {
23 type Ux = u32;
24}
25#[doc = "`write(|w| ..)` method takes [`core_1_nmi_mask_disable::W`](W) writer structure"]
26impl crate::Writable for CORE_1_NMI_MASK_DISABLE_SPEC {
27 type Safety = crate::Unsafe;
28 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
29 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
30}
31#[doc = "`reset()` method sets Core_1_NMI_MASK_DISABLE to value 0"]
32impl crate::Resettable for CORE_1_NMI_MASK_DISABLE_SPEC {
33 const RESET_VALUE: u32 = 0;
34}