esp32s3/extmem/
core0_dbus_reject_st.rs

1#[doc = "Register `CORE0_DBUS_REJECT_ST` reader"]
2pub type R = crate::R<CORE0_DBUS_REJECT_ST_SPEC>;
3#[doc = "Field `CORE0_DBUS_TAG_ATTR` reader - The bits are used to indicate the attribute of data from external memory when authentication fail. 0: invalidate, 1: execute-able, 2: read-able, 4: write-able."]
4pub type CORE0_DBUS_TAG_ATTR_R = crate::FieldReader;
5#[doc = "Field `CORE0_DBUS_ATTR` reader - The bits are used to indicate the attribute of CPU access dbus when authentication fail. 0: invalidate, 1: execute-able, 2: read-able, 4: write-able."]
6pub type CORE0_DBUS_ATTR_R = crate::FieldReader;
7#[doc = "Field `CORE0_DBUS_WORLD` reader - The bit is used to indicate the world of CPU access dbus when authentication fail. 0: WORLD0, 1: WORLD1"]
8pub type CORE0_DBUS_WORLD_R = crate::BitReader;
9impl R {
10    #[doc = "Bits 0:2 - The bits are used to indicate the attribute of data from external memory when authentication fail. 0: invalidate, 1: execute-able, 2: read-able, 4: write-able."]
11    #[inline(always)]
12    pub fn core0_dbus_tag_attr(&self) -> CORE0_DBUS_TAG_ATTR_R {
13        CORE0_DBUS_TAG_ATTR_R::new((self.bits & 7) as u8)
14    }
15    #[doc = "Bits 3:5 - The bits are used to indicate the attribute of CPU access dbus when authentication fail. 0: invalidate, 1: execute-able, 2: read-able, 4: write-able."]
16    #[inline(always)]
17    pub fn core0_dbus_attr(&self) -> CORE0_DBUS_ATTR_R {
18        CORE0_DBUS_ATTR_R::new(((self.bits >> 3) & 7) as u8)
19    }
20    #[doc = "Bit 6 - The bit is used to indicate the world of CPU access dbus when authentication fail. 0: WORLD0, 1: WORLD1"]
21    #[inline(always)]
22    pub fn core0_dbus_world(&self) -> CORE0_DBUS_WORLD_R {
23        CORE0_DBUS_WORLD_R::new(((self.bits >> 6) & 1) != 0)
24    }
25}
26#[cfg(feature = "impl-register-debug")]
27impl core::fmt::Debug for R {
28    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
29        f.debug_struct("CORE0_DBUS_REJECT_ST")
30            .field("core0_dbus_tag_attr", &self.core0_dbus_tag_attr())
31            .field("core0_dbus_attr", &self.core0_dbus_attr())
32            .field("core0_dbus_world", &self.core0_dbus_world())
33            .finish()
34    }
35}
36#[doc = "******* Description ***********\n\nYou can [`read`](crate::Reg::read) this register and get [`core0_dbus_reject_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
37pub struct CORE0_DBUS_REJECT_ST_SPEC;
38impl crate::RegisterSpec for CORE0_DBUS_REJECT_ST_SPEC {
39    type Ux = u32;
40}
41#[doc = "`read()` method returns [`core0_dbus_reject_st::R`](R) reader structure"]
42impl crate::Readable for CORE0_DBUS_REJECT_ST_SPEC {}
43#[doc = "`reset()` method sets CORE0_DBUS_REJECT_ST to value 0"]
44impl crate::Resettable for CORE0_DBUS_REJECT_ST_SPEC {
45    const RESET_VALUE: u32 = 0;
46}
esp32s3/extmem/core0_dbus_reject_st.rs

esp32s3/extmem/
core0_dbus_reject_st.rs
