esp32s3/usb0/in_ep/
diepctl.rs1#[doc = "Register `DIEPCTL` reader"]
2pub type R = crate::R<DIEPCTL_SPEC>;
3#[doc = "Register `DIEPCTL` writer"]
4pub type W = crate::W<DIEPCTL_SPEC>;
5#[doc = "Field `MPS` reader - "]
6pub type MPS_R = crate::FieldReader<u16>;
7#[doc = "Field `MPS` writer - "]
8pub type MPS_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16, crate::Safe>;
9#[doc = "Field `USBACTEP` reader - "]
10pub type USBACTEP_R = crate::BitReader;
11#[doc = "Field `USBACTEP` writer - "]
12pub type USBACTEP_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `NAKSTS` reader - "]
14pub type NAKSTS_R = crate::BitReader;
15#[doc = "Field `EPTYPE` reader - "]
16pub type EPTYPE_R = crate::FieldReader;
17#[doc = "Field `EPTYPE` writer - "]
18pub type EPTYPE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, u8, crate::Safe>;
19#[doc = "Field `STALL` reader - "]
20pub type STALL_R = crate::BitReader;
21#[doc = "Field `STALL` writer - "]
22pub type STALL_W<'a, REG> = crate::BitWriter<'a, REG>;
23#[doc = "Field `TXFNUM` reader - "]
24pub type TXFNUM_R = crate::FieldReader;
25#[doc = "Field `TXFNUM` writer - "]
26pub type TXFNUM_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
27#[doc = "Field `CNAK` writer - "]
28pub type CNAK_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `SNAK` writer - "]
30pub type SNAK_W<'a, REG> = crate::BitWriter<'a, REG>;
31#[doc = "Field `SETD0PID` writer - "]
32pub type SETD0PID_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `SETD1PID` writer - "]
34pub type SETD1PID_W<'a, REG> = crate::BitWriter<'a, REG>;
35#[doc = "Field `EPDIS` reader - "]
36pub type EPDIS_R = crate::BitReader;
37#[doc = "Field `EPDIS` writer - "]
38pub type EPDIS_W<'a, REG> = crate::BitWriter<'a, REG>;
39#[doc = "Field `EPENA` reader - "]
40pub type EPENA_R = crate::BitReader;
41#[doc = "Field `EPENA` writer - "]
42pub type EPENA_W<'a, REG> = crate::BitWriter<'a, REG>;
43impl R {
44 #[doc = "Bits 0:10"]
45 #[inline(always)]
46 pub fn mps(&self) -> MPS_R {
47 MPS_R::new((self.bits & 0x07ff) as u16)
48 }
49 #[doc = "Bit 15"]
50 #[inline(always)]
51 pub fn usbactep(&self) -> USBACTEP_R {
52 USBACTEP_R::new(((self.bits >> 15) & 1) != 0)
53 }
54 #[doc = "Bit 17"]
55 #[inline(always)]
56 pub fn naksts(&self) -> NAKSTS_R {
57 NAKSTS_R::new(((self.bits >> 17) & 1) != 0)
58 }
59 #[doc = "Bits 18:19"]
60 #[inline(always)]
61 pub fn eptype(&self) -> EPTYPE_R {
62 EPTYPE_R::new(((self.bits >> 18) & 3) as u8)
63 }
64 #[doc = "Bit 21"]
65 #[inline(always)]
66 pub fn stall(&self) -> STALL_R {
67 STALL_R::new(((self.bits >> 21) & 1) != 0)
68 }
69 #[doc = "Bits 22:25"]
70 #[inline(always)]
71 pub fn txfnum(&self) -> TXFNUM_R {
72 TXFNUM_R::new(((self.bits >> 22) & 0x0f) as u8)
73 }
74 #[doc = "Bit 30"]
75 #[inline(always)]
76 pub fn epdis(&self) -> EPDIS_R {
77 EPDIS_R::new(((self.bits >> 30) & 1) != 0)
78 }
79 #[doc = "Bit 31"]
80 #[inline(always)]
81 pub fn epena(&self) -> EPENA_R {
82 EPENA_R::new(((self.bits >> 31) & 1) != 0)
83 }
84}
85#[cfg(feature = "impl-register-debug")]
86impl core::fmt::Debug for R {
87 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
88 f.debug_struct("DIEPCTL")
89 .field("mps", &self.mps())
90 .field("usbactep", &self.usbactep())
91 .field("naksts", &self.naksts())
92 .field("eptype", &self.eptype())
93 .field("stall", &self.stall())
94 .field("txfnum", &self.txfnum())
95 .field("epdis", &self.epdis())
96 .field("epena", &self.epena())
97 .finish()
98 }
99}
100impl W {
101 #[doc = "Bits 0:10"]
102 #[inline(always)]
103 pub fn mps(&mut self) -> MPS_W<DIEPCTL_SPEC> {
104 MPS_W::new(self, 0)
105 }
106 #[doc = "Bit 15"]
107 #[inline(always)]
108 pub fn usbactep(&mut self) -> USBACTEP_W<DIEPCTL_SPEC> {
109 USBACTEP_W::new(self, 15)
110 }
111 #[doc = "Bits 18:19"]
112 #[inline(always)]
113 pub fn eptype(&mut self) -> EPTYPE_W<DIEPCTL_SPEC> {
114 EPTYPE_W::new(self, 18)
115 }
116 #[doc = "Bit 21"]
117 #[inline(always)]
118 pub fn stall(&mut self) -> STALL_W<DIEPCTL_SPEC> {
119 STALL_W::new(self, 21)
120 }
121 #[doc = "Bits 22:25"]
122 #[inline(always)]
123 pub fn txfnum(&mut self) -> TXFNUM_W<DIEPCTL_SPEC> {
124 TXFNUM_W::new(self, 22)
125 }
126 #[doc = "Bit 26"]
127 #[inline(always)]
128 pub fn cnak(&mut self) -> CNAK_W<DIEPCTL_SPEC> {
129 CNAK_W::new(self, 26)
130 }
131 #[doc = "Bit 27"]
132 #[inline(always)]
133 pub fn snak(&mut self) -> SNAK_W<DIEPCTL_SPEC> {
134 SNAK_W::new(self, 27)
135 }
136 #[doc = "Bit 28"]
137 #[inline(always)]
138 pub fn setd0pid(&mut self) -> SETD0PID_W<DIEPCTL_SPEC> {
139 SETD0PID_W::new(self, 28)
140 }
141 #[doc = "Bit 29"]
142 #[inline(always)]
143 pub fn setd1pid(&mut self) -> SETD1PID_W<DIEPCTL_SPEC> {
144 SETD1PID_W::new(self, 29)
145 }
146 #[doc = "Bit 30"]
147 #[inline(always)]
148 pub fn epdis(&mut self) -> EPDIS_W<DIEPCTL_SPEC> {
149 EPDIS_W::new(self, 30)
150 }
151 #[doc = "Bit 31"]
152 #[inline(always)]
153 pub fn epena(&mut self) -> EPENA_W<DIEPCTL_SPEC> {
154 EPENA_W::new(self, 31)
155 }
156}
157#[doc = "\n\nYou can [`read`](crate::Reg::read) this register and get [`diepctl::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`diepctl::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
158pub struct DIEPCTL_SPEC;
159impl crate::RegisterSpec for DIEPCTL_SPEC {
160 type Ux = u32;
161}
162#[doc = "`read()` method returns [`diepctl::R`](R) reader structure"]
163impl crate::Readable for DIEPCTL_SPEC {}
164#[doc = "`write(|w| ..)` method takes [`diepctl::W`](W) writer structure"]
165impl crate::Writable for DIEPCTL_SPEC {
166 type Safety = crate::Unsafe;
167 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
168 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
169}
170#[doc = "`reset()` method sets DIEPCTL to value 0x8000"]
171impl crate::Resettable for DIEPCTL_SPEC {
172 const RESET_VALUE: u32 = 0x8000;
173}