1#[doc = "Register `CORE_1_PIF_PMS_CONSTRAIN_8` reader"]
2pub type R = crate::R<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC>;
3#[doc = "Register `CORE_1_PIF_PMS_CONSTRAIN_8` writer"]
4pub type W = crate::W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC>;
5#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE` reader - Core1 access usb_device permission in world1."]
6pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE_R = crate::FieldReader;
7#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE` writer - Core1 access usb_device permission in world1."]
8pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP` reader - Core1 access usb_wrap permission in world1."]
10pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP_R = crate::FieldReader;
11#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP` writer - Core1 access usb_wrap permission in world1."]
12pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI` reader - Core1 access crypto_peri permission in world1."]
14pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI_R = crate::FieldReader;
15#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI` writer - Core1 access crypto_peri permission in world1."]
16pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
17#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA` reader - Core1 access crypto_dma permission in world1."]
18pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA_R = crate::FieldReader;
19#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA` writer - Core1 access crypto_dma permission in world1."]
20pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
21#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC` reader - Core1 access apb_adc permission in world1."]
22pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC_R = crate::FieldReader;
23#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC` writer - Core1 access apb_adc permission in world1."]
24pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
25#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM` reader - Core1 access lcd_cam permission in world1."]
26pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM_R = crate::FieldReader;
27#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM` writer - Core1 access lcd_cam permission in world1."]
28pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
29#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR` reader - Core1 access bt_pwr permission in world1."]
30pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR_R = crate::FieldReader;
31#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR` writer - Core1 access bt_pwr permission in world1."]
32pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
33#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB` reader - Core1 access usb permission in world1."]
34pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_R = crate::FieldReader;
35#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB` writer - Core1 access usb permission in world1."]
36pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
37#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM` reader - Core1 access system permission in world1."]
38pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM_R = crate::FieldReader;
39#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM` writer - Core1 access system permission in world1."]
40pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
41#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE` reader - Core1 access sensitive permission in world1."]
42pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE_R = crate::FieldReader;
43#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE` writer - Core1 access sensitive permission in world1."]
44pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
45#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT` reader - Core1 access interrupt permission in world1."]
46pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT_R = crate::FieldReader;
47#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT` writer - Core1 access interrupt permission in world1."]
48pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
49#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY` reader - Core1 access dma_copy permission in world1."]
50pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY_R = crate::FieldReader;
51#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY` writer - Core1 access dma_copy permission in world1."]
52pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
53#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG` reader - Core1 access cache_config permission in world1."]
54pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG_R = crate::FieldReader;
55#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG` writer - Core1 access cache_config permission in world1."]
56pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
57#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_AD` reader - Core1 access ad permission in world1."]
58pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_AD_R = crate::FieldReader;
59#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_AD` writer - Core1 access ad permission in world1."]
60pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_AD_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
61#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DIO` reader - Core1 access dio permission in world1."]
62pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DIO_R = crate::FieldReader;
63#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DIO` writer - Core1 access dio permission in world1."]
64pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DIO_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
65#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER` reader - Core1 access world_controller permission in world1."]
66pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER_R = crate::FieldReader;
67#[doc = "Field `CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER` writer - Core1 access world_controller permission in world1."]
68pub type CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER_W<'a, REG> =
69 crate::FieldWriter<'a, REG, 2>;
70impl R {
71 #[doc = "Bits 0:1 - Core1 access usb_device permission in world1."]
72 #[inline(always)]
73 pub fn core_1_pif_pms_constrain_world_1_usb_device(
74 &self,
75 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE_R {
76 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE_R::new((self.bits & 3) as u8)
77 }
78 #[doc = "Bits 2:3 - Core1 access usb_wrap permission in world1."]
79 #[inline(always)]
80 pub fn core_1_pif_pms_constrain_world_1_usb_wrap(
81 &self,
82 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP_R {
83 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP_R::new(((self.bits >> 2) & 3) as u8)
84 }
85 #[doc = "Bits 4:5 - Core1 access crypto_peri permission in world1."]
86 #[inline(always)]
87 pub fn core_1_pif_pms_constrain_world_1_crypto_peri(
88 &self,
89 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI_R {
90 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI_R::new(((self.bits >> 4) & 3) as u8)
91 }
92 #[doc = "Bits 6:7 - Core1 access crypto_dma permission in world1."]
93 #[inline(always)]
94 pub fn core_1_pif_pms_constrain_world_1_crypto_dma(
95 &self,
96 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA_R {
97 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA_R::new(((self.bits >> 6) & 3) as u8)
98 }
99 #[doc = "Bits 8:9 - Core1 access apb_adc permission in world1."]
100 #[inline(always)]
101 pub fn core_1_pif_pms_constrain_world_1_apb_adc(
102 &self,
103 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC_R {
104 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC_R::new(((self.bits >> 8) & 3) as u8)
105 }
106 #[doc = "Bits 10:11 - Core1 access lcd_cam permission in world1."]
107 #[inline(always)]
108 pub fn core_1_pif_pms_constrain_world_1_lcd_cam(
109 &self,
110 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM_R {
111 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM_R::new(((self.bits >> 10) & 3) as u8)
112 }
113 #[doc = "Bits 12:13 - Core1 access bt_pwr permission in world1."]
114 #[inline(always)]
115 pub fn core_1_pif_pms_constrain_world_1_bt_pwr(
116 &self,
117 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR_R {
118 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR_R::new(((self.bits >> 12) & 3) as u8)
119 }
120 #[doc = "Bits 14:15 - Core1 access usb permission in world1."]
121 #[inline(always)]
122 pub fn core_1_pif_pms_constrain_world_1_usb(&self) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_R {
123 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_R::new(((self.bits >> 14) & 3) as u8)
124 }
125 #[doc = "Bits 16:17 - Core1 access system permission in world1."]
126 #[inline(always)]
127 pub fn core_1_pif_pms_constrain_world_1_system(
128 &self,
129 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM_R {
130 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM_R::new(((self.bits >> 16) & 3) as u8)
131 }
132 #[doc = "Bits 18:19 - Core1 access sensitive permission in world1."]
133 #[inline(always)]
134 pub fn core_1_pif_pms_constrain_world_1_sensitive(
135 &self,
136 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE_R {
137 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE_R::new(((self.bits >> 18) & 3) as u8)
138 }
139 #[doc = "Bits 20:21 - Core1 access interrupt permission in world1."]
140 #[inline(always)]
141 pub fn core_1_pif_pms_constrain_world_1_interrupt(
142 &self,
143 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT_R {
144 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT_R::new(((self.bits >> 20) & 3) as u8)
145 }
146 #[doc = "Bits 22:23 - Core1 access dma_copy permission in world1."]
147 #[inline(always)]
148 pub fn core_1_pif_pms_constrain_world_1_dma_copy(
149 &self,
150 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY_R {
151 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY_R::new(((self.bits >> 22) & 3) as u8)
152 }
153 #[doc = "Bits 24:25 - Core1 access cache_config permission in world1."]
154 #[inline(always)]
155 pub fn core_1_pif_pms_constrain_world_1_cache_config(
156 &self,
157 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG_R {
158 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG_R::new(((self.bits >> 24) & 3) as u8)
159 }
160 #[doc = "Bits 26:27 - Core1 access ad permission in world1."]
161 #[inline(always)]
162 pub fn core_1_pif_pms_constrain_world_1_ad(&self) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_AD_R {
163 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_AD_R::new(((self.bits >> 26) & 3) as u8)
164 }
165 #[doc = "Bits 28:29 - Core1 access dio permission in world1."]
166 #[inline(always)]
167 pub fn core_1_pif_pms_constrain_world_1_dio(&self) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DIO_R {
168 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DIO_R::new(((self.bits >> 28) & 3) as u8)
169 }
170 #[doc = "Bits 30:31 - Core1 access world_controller permission in world1."]
171 #[inline(always)]
172 pub fn core_1_pif_pms_constrain_world_1_world_controller(
173 &self,
174 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER_R {
175 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER_R::new(((self.bits >> 30) & 3) as u8)
176 }
177}
178#[cfg(feature = "impl-register-debug")]
179impl core::fmt::Debug for R {
180 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
181 f.debug_struct("CORE_1_PIF_PMS_CONSTRAIN_8")
182 .field(
183 "core_1_pif_pms_constrain_world_1_usb_device",
184 &self.core_1_pif_pms_constrain_world_1_usb_device(),
185 )
186 .field(
187 "core_1_pif_pms_constrain_world_1_usb_wrap",
188 &self.core_1_pif_pms_constrain_world_1_usb_wrap(),
189 )
190 .field(
191 "core_1_pif_pms_constrain_world_1_crypto_peri",
192 &self.core_1_pif_pms_constrain_world_1_crypto_peri(),
193 )
194 .field(
195 "core_1_pif_pms_constrain_world_1_crypto_dma",
196 &self.core_1_pif_pms_constrain_world_1_crypto_dma(),
197 )
198 .field(
199 "core_1_pif_pms_constrain_world_1_apb_adc",
200 &self.core_1_pif_pms_constrain_world_1_apb_adc(),
201 )
202 .field(
203 "core_1_pif_pms_constrain_world_1_lcd_cam",
204 &self.core_1_pif_pms_constrain_world_1_lcd_cam(),
205 )
206 .field(
207 "core_1_pif_pms_constrain_world_1_bt_pwr",
208 &self.core_1_pif_pms_constrain_world_1_bt_pwr(),
209 )
210 .field(
211 "core_1_pif_pms_constrain_world_1_usb",
212 &self.core_1_pif_pms_constrain_world_1_usb(),
213 )
214 .field(
215 "core_1_pif_pms_constrain_world_1_system",
216 &self.core_1_pif_pms_constrain_world_1_system(),
217 )
218 .field(
219 "core_1_pif_pms_constrain_world_1_sensitive",
220 &self.core_1_pif_pms_constrain_world_1_sensitive(),
221 )
222 .field(
223 "core_1_pif_pms_constrain_world_1_interrupt",
224 &self.core_1_pif_pms_constrain_world_1_interrupt(),
225 )
226 .field(
227 "core_1_pif_pms_constrain_world_1_dma_copy",
228 &self.core_1_pif_pms_constrain_world_1_dma_copy(),
229 )
230 .field(
231 "core_1_pif_pms_constrain_world_1_cache_config",
232 &self.core_1_pif_pms_constrain_world_1_cache_config(),
233 )
234 .field(
235 "core_1_pif_pms_constrain_world_1_ad",
236 &self.core_1_pif_pms_constrain_world_1_ad(),
237 )
238 .field(
239 "core_1_pif_pms_constrain_world_1_dio",
240 &self.core_1_pif_pms_constrain_world_1_dio(),
241 )
242 .field(
243 "core_1_pif_pms_constrain_world_1_world_controller",
244 &self.core_1_pif_pms_constrain_world_1_world_controller(),
245 )
246 .finish()
247 }
248}
249impl W {
250 #[doc = "Bits 0:1 - Core1 access usb_device permission in world1."]
251 #[inline(always)]
252 pub fn core_1_pif_pms_constrain_world_1_usb_device(
253 &mut self,
254 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE_W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC> {
255 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_DEVICE_W::new(self, 0)
256 }
257 #[doc = "Bits 2:3 - Core1 access usb_wrap permission in world1."]
258 #[inline(always)]
259 pub fn core_1_pif_pms_constrain_world_1_usb_wrap(
260 &mut self,
261 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP_W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC> {
262 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_WRAP_W::new(self, 2)
263 }
264 #[doc = "Bits 4:5 - Core1 access crypto_peri permission in world1."]
265 #[inline(always)]
266 pub fn core_1_pif_pms_constrain_world_1_crypto_peri(
267 &mut self,
268 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI_W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC> {
269 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_PERI_W::new(self, 4)
270 }
271 #[doc = "Bits 6:7 - Core1 access crypto_dma permission in world1."]
272 #[inline(always)]
273 pub fn core_1_pif_pms_constrain_world_1_crypto_dma(
274 &mut self,
275 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA_W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC> {
276 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CRYPTO_DMA_W::new(self, 6)
277 }
278 #[doc = "Bits 8:9 - Core1 access apb_adc permission in world1."]
279 #[inline(always)]
280 pub fn core_1_pif_pms_constrain_world_1_apb_adc(
281 &mut self,
282 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC_W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC> {
283 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_APB_ADC_W::new(self, 8)
284 }
285 #[doc = "Bits 10:11 - Core1 access lcd_cam permission in world1."]
286 #[inline(always)]
287 pub fn core_1_pif_pms_constrain_world_1_lcd_cam(
288 &mut self,
289 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM_W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC> {
290 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LCD_CAM_W::new(self, 10)
291 }
292 #[doc = "Bits 12:13 - Core1 access bt_pwr permission in world1."]
293 #[inline(always)]
294 pub fn core_1_pif_pms_constrain_world_1_bt_pwr(
295 &mut self,
296 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR_W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC> {
297 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT_PWR_W::new(self, 12)
298 }
299 #[doc = "Bits 14:15 - Core1 access usb permission in world1."]
300 #[inline(always)]
301 pub fn core_1_pif_pms_constrain_world_1_usb(
302 &mut self,
303 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC> {
304 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_USB_W::new(self, 14)
305 }
306 #[doc = "Bits 16:17 - Core1 access system permission in world1."]
307 #[inline(always)]
308 pub fn core_1_pif_pms_constrain_world_1_system(
309 &mut self,
310 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM_W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC> {
311 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTEM_W::new(self, 16)
312 }
313 #[doc = "Bits 18:19 - Core1 access sensitive permission in world1."]
314 #[inline(always)]
315 pub fn core_1_pif_pms_constrain_world_1_sensitive(
316 &mut self,
317 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE_W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC> {
318 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SENSITIVE_W::new(self, 18)
319 }
320 #[doc = "Bits 20:21 - Core1 access interrupt permission in world1."]
321 #[inline(always)]
322 pub fn core_1_pif_pms_constrain_world_1_interrupt(
323 &mut self,
324 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT_W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC> {
325 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_INTERRUPT_W::new(self, 20)
326 }
327 #[doc = "Bits 22:23 - Core1 access dma_copy permission in world1."]
328 #[inline(always)]
329 pub fn core_1_pif_pms_constrain_world_1_dma_copy(
330 &mut self,
331 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY_W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC> {
332 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DMA_COPY_W::new(self, 22)
333 }
334 #[doc = "Bits 24:25 - Core1 access cache_config permission in world1."]
335 #[inline(always)]
336 pub fn core_1_pif_pms_constrain_world_1_cache_config(
337 &mut self,
338 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG_W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC> {
339 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_CACHE_CONFIG_W::new(self, 24)
340 }
341 #[doc = "Bits 26:27 - Core1 access ad permission in world1."]
342 #[inline(always)]
343 pub fn core_1_pif_pms_constrain_world_1_ad(
344 &mut self,
345 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_AD_W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC> {
346 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_AD_W::new(self, 26)
347 }
348 #[doc = "Bits 28:29 - Core1 access dio permission in world1."]
349 #[inline(always)]
350 pub fn core_1_pif_pms_constrain_world_1_dio(
351 &mut self,
352 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DIO_W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC> {
353 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_DIO_W::new(self, 28)
354 }
355 #[doc = "Bits 30:31 - Core1 access world_controller permission in world1."]
356 #[inline(always)]
357 pub fn core_1_pif_pms_constrain_world_1_world_controller(
358 &mut self,
359 ) -> CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER_W<CORE_1_PIF_PMS_CONSTRAIN_8_SPEC> {
360 CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_WORLD_CONTROLLER_W::new(self, 30)
361 }
362}
363#[doc = "Core1 access peripherals permission configuration register 8.\n\nYou can [`read`](crate::Reg::read) this register and get [`core_1_pif_pms_constrain_8::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_1_pif_pms_constrain_8::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
364pub struct CORE_1_PIF_PMS_CONSTRAIN_8_SPEC;
365impl crate::RegisterSpec for CORE_1_PIF_PMS_CONSTRAIN_8_SPEC {
366 type Ux = u32;
367}
368#[doc = "`read()` method returns [`core_1_pif_pms_constrain_8::R`](R) reader structure"]
369impl crate::Readable for CORE_1_PIF_PMS_CONSTRAIN_8_SPEC {}
370#[doc = "`write(|w| ..)` method takes [`core_1_pif_pms_constrain_8::W`](W) writer structure"]
371impl crate::Writable for CORE_1_PIF_PMS_CONSTRAIN_8_SPEC {
372 type Safety = crate::Unsafe;
373 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
374 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
375}
376#[doc = "`reset()` method sets CORE_1_PIF_PMS_CONSTRAIN_8 to value 0xffff_ffff"]
377impl crate::Resettable for CORE_1_PIF_PMS_CONSTRAIN_8_SPEC {
378 const RESET_VALUE: u32 = 0xffff_ffff;
379}