esp32s3/dma/
extmem_reject_int_clr.rs

1#[doc = "Register `EXTMEM_REJECT_INT_CLR` writer"]
2pub type W = crate::W<EXTMEM_REJECT_INT_CLR_SPEC>;
3#[doc = "Field `EXTMEM_REJECT_INT_CLR` writer - Set this bit to clear the EXTMEM_REJECT_INT interrupt."]
4pub type EXTMEM_REJECT_INT_CLR_W<'a, REG> = crate::BitWriter<'a, REG>;
5#[cfg(feature = "impl-register-debug")]
6impl core::fmt::Debug for crate::generic::Reg<EXTMEM_REJECT_INT_CLR_SPEC> {
7    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
8        write!(f, "(not readable)")
9    }
10}
11impl W {
12    #[doc = "Bit 0 - Set this bit to clear the EXTMEM_REJECT_INT interrupt."]
13    #[inline(always)]
14    pub fn extmem_reject_int_clr(&mut self) -> EXTMEM_REJECT_INT_CLR_W<EXTMEM_REJECT_INT_CLR_SPEC> {
15        EXTMEM_REJECT_INT_CLR_W::new(self, 0)
16    }
17}
18#[doc = "Interrupt clear bits of external RAM permission\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`extmem_reject_int_clr::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
19pub struct EXTMEM_REJECT_INT_CLR_SPEC;
20impl crate::RegisterSpec for EXTMEM_REJECT_INT_CLR_SPEC {
21    type Ux = u32;
22}
23#[doc = "`write(|w| ..)` method takes [`extmem_reject_int_clr::W`](W) writer structure"]
24impl crate::Writable for EXTMEM_REJECT_INT_CLR_SPEC {
25    type Safety = crate::Unsafe;
26    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
27    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
28}
29#[doc = "`reset()` method sets EXTMEM_REJECT_INT_CLR to value 0"]
30impl crate::Resettable for EXTMEM_REJECT_INT_CLR_SPEC {
31    const RESET_VALUE: u32 = 0;
32}
esp32s3/dma/extmem_reject_int_clr.rs

esp32s3/dma/
extmem_reject_int_clr.rs
