esp32s3

Struct WCL

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pub struct WCL { /* private fields */ }
Expand description

WCL Peripheral

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impl WCL

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pub const PTR: *const RegisterBlock = {0x600d0000 as *const wcl::RegisterBlock}

Pointer to the register block

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pub const fn ptr() -> *const RegisterBlock

Return the pointer to the register block

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pub unsafe fn steal() -> Self

Steal an instance of this peripheral

§Safety

Ensure that the new instance of the peripheral cannot be used in a way that may race with any existing instances, for example by only accessing read-only or write-only registers, or by consuming the original peripheral and using critical sections to coordinate access between multiple new instances.

Additionally, other software such as HALs may rely on only one peripheral instance existing to ensure memory safety; ensure no stolen instances are passed to such software.

Methods from Deref<Target = RegisterBlock>§

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pub fn core_0_entry_1_addr(&self) -> &CORE_0_ENTRY_1_ADDR

0x00 - Core_0 Entry 1 address configuration Register

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pub fn core_0_entry_2_addr(&self) -> &CORE_0_ENTRY_2_ADDR

0x04 - Core_0 Entry 2 address configuration Register

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pub fn core_0_entry_3_addr(&self) -> &CORE_0_ENTRY_3_ADDR

0x08 - Core_0 Entry 3 address configuration Register

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pub fn core_0_entry_4_addr(&self) -> &CORE_0_ENTRY_4_ADDR

0x0c - Core_0 Entry 4 address configuration Register

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pub fn core_0_entry_5_addr(&self) -> &CORE_0_ENTRY_5_ADDR

0x10 - Core_0 Entry 5 address configuration Register

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pub fn core_0_entry_6_addr(&self) -> &CORE_0_ENTRY_6_ADDR

0x14 - Core_0 Entry 6 address configuration Register

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pub fn core_0_entry_7_addr(&self) -> &CORE_0_ENTRY_7_ADDR

0x18 - Core_0 Entry 7 address configuration Register

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pub fn core_0_entry_8_addr(&self) -> &CORE_0_ENTRY_8_ADDR

0x1c - Core_0 Entry 8 address configuration Register

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pub fn core_0_entry_9_addr(&self) -> &CORE_0_ENTRY_9_ADDR

0x20 - Core_0 Entry 9 address configuration Register

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pub fn core_0_entry_10_addr(&self) -> &CORE_0_ENTRY_10_ADDR

0x24 - Core_0 Entry 10 address configuration Register

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pub fn core_0_entry_11_addr(&self) -> &CORE_0_ENTRY_11_ADDR

0x28 - Core_0 Entry 11 address configuration Register

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pub fn core_0_entry_12_addr(&self) -> &CORE_0_ENTRY_12_ADDR

0x2c - Core_0 Entry 12 address configuration Register

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pub fn core_0_entry_13_addr(&self) -> &CORE_0_ENTRY_13_ADDR

0x30 - Core_0 Entry 13 address configuration Register

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pub fn core_0_entry_check(&self) -> &CORE_0_ENTRY_CHECK

0x7c - Core_0 Entry check configuration Register

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pub fn core_0_statustable1(&self) -> &CORE_0_STATUSTABLE1

0x80 - Status register of world switch of entry 1

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pub fn core_0_statustable2(&self) -> &CORE_0_STATUSTABLE2

0x84 - Status register of world switch of entry 2

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pub fn core_0_statustable3(&self) -> &CORE_0_STATUSTABLE3

0x88 - Status register of world switch of entry 3

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pub fn core_0_statustable4(&self) -> &CORE_0_STATUSTABLE4

0x8c - Status register of world switch of entry 4

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pub fn core_0_statustable5(&self) -> &CORE_0_STATUSTABLE5

0x90 - Status register of world switch of entry 5

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pub fn core_0_statustable6(&self) -> &CORE_0_STATUSTABLE6

0x94 - Status register of world switch of entry 6

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pub fn core_0_statustable7(&self) -> &CORE_0_STATUSTABLE7

0x98 - Status register of world switch of entry 7

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pub fn core_0_statustable8(&self) -> &CORE_0_STATUSTABLE8

0x9c - Status register of world switch of entry 8

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pub fn core_0_statustable9(&self) -> &CORE_0_STATUSTABLE9

0xa0 - Status register of world switch of entry 9

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pub fn core_0_statustable10(&self) -> &CORE_0_STATUSTABLE10

0xa4 - Status register of world switch of entry 10

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pub fn core_0_statustable11(&self) -> &CORE_0_STATUSTABLE11

0xa8 - Status register of world switch of entry 11

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pub fn core_0_statustable12(&self) -> &CORE_0_STATUSTABLE12

0xac - Status register of world switch of entry 12

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pub fn core_0_statustable13(&self) -> &CORE_0_STATUSTABLE13

0xb0 - Status register of world switch of entry 13

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pub fn core_0_statustable_current(&self) -> &CORE_0_STATUSTABLE_CURRENT

0xfc - Status register of statustable current

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pub fn core_0_message_addr(&self) -> &CORE_0_MESSAGE_ADDR

0x100 - Clear writer_buffer write address configuration register

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pub fn core_0_message_max(&self) -> &CORE_0_MESSAGE_MAX

0x104 - Clear writer_buffer write number configuration register

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pub fn core_0_message_phase(&self) -> &CORE_0_MESSAGE_PHASE

0x108 - Clear writer_buffer status register

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pub fn core_0_world_trigger_addr(&self) -> &CORE_0_WORLD_TRIGGER_ADDR

0x140 - Core_0 trigger address configuration Register

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pub fn core_0_world_prepare(&self) -> &CORE_0_WORLD_PREPARE

0x144 - Core_0 prepare world configuration Register

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pub fn core_0_world_update(&self) -> &CORE_0_WORLD_UPDATE

0x148 - Core_0 configuration update register

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pub fn core_0_world_cancel(&self) -> &CORE_0_WORLD_CANCEL

0x14c - Core_0 configuration cancel register

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pub fn core_0_world_iram0(&self) -> &CORE_0_WORLD_IRAM0

0x150 - Core_0 Iram0 world register

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pub fn core_0_world_dram0_pif(&self) -> &CORE_0_WORLD_DRAM0_PIF

0x154 - Core_0 dram0 and PIF world register

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pub fn core_0_world_phase(&self) -> &CORE_0_WORLD_PHASE

0x158 - Core_0 world status register

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pub fn core_0_nmi_mask_enable(&self) -> &CORE_0_NMI_MASK_ENABLE

0x180 - Core_0 NMI mask enable register

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pub fn core_0_nmi_mask_trigger_addr(&self) -> &CORE_0_NMI_MASK_TRIGGER_ADDR

0x184 - Core_0 NMI mask trigger address register

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pub fn core_0_nmi_mask_disable(&self) -> &CORE_0_NMI_MASK_DISABLE

0x188 - Core_0 NMI mask disable register

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pub fn core_0_nmi_mask_cancle(&self) -> &CORE_0_NMI_MASK_CANCLE

0x18c - Core_0 NMI mask disable register

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pub fn core_0_nmi_mask(&self) -> &CORE_0_NMI_MASK

0x190 - Core_0 NMI mask register

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pub fn core_0_nmi_mask_phase(&self) -> &CORE_0_NMI_MASK_PHASE

0x194 - Core_0 NMI mask phase register

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pub fn core_1_entry_1_addr(&self) -> &CORE_1_ENTRY_1_ADDR

0x400 - Core_1 Entry 1 address configuration Register

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pub fn core_1_entry_2_addr(&self) -> &CORE_1_ENTRY_2_ADDR

0x404 - Core_1 Entry 2 address configuration Register

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pub fn core_1_entry_3_addr(&self) -> &CORE_1_ENTRY_3_ADDR

0x408 - Core_1 Entry 3 address configuration Register

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pub fn core_1_entry_4_addr(&self) -> &CORE_1_ENTRY_4_ADDR

0x40c - Core_1 Entry 4 address configuration Register

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pub fn core_1_entry_5_addr(&self) -> &CORE_1_ENTRY_5_ADDR

0x410 - Core_1 Entry 5 address configuration Register

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pub fn core_1_entry_6_addr(&self) -> &CORE_1_ENTRY_6_ADDR

0x414 - Core_1 Entry 6 address configuration Register

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pub fn core_1_entry_7_addr(&self) -> &CORE_1_ENTRY_7_ADDR

0x418 - Core_1 Entry 7 address configuration Register

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pub fn core_1_entry_8_addr(&self) -> &CORE_1_ENTRY_8_ADDR

0x41c - Core_1 Entry 8 address configuration Register

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pub fn core_1_entry_9_addr(&self) -> &CORE_1_ENTRY_9_ADDR

0x420 - Core_1 Entry 9 address configuration Register

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pub fn core_1_entry_10_addr(&self) -> &CORE_1_ENTRY_10_ADDR

0x424 - Core_1 Entry 10 address configuration Register

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pub fn core_1_entry_11_addr(&self) -> &CORE_1_ENTRY_11_ADDR

0x428 - Core_1 Entry 11 address configuration Register

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pub fn core_1_entry_12_addr(&self) -> &CORE_1_ENTRY_12_ADDR

0x42c - Core_1 Entry 12 address configuration Register

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pub fn core_1_entry_13_addr(&self) -> &CORE_1_ENTRY_13_ADDR

0x430 - Core_1 Entry 13 address configuration Register

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pub fn core_1_entry_check(&self) -> &CORE_1_ENTRY_CHECK

0x47c - Core_1 Entry check configuration Register

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pub fn core_1_statustable1(&self) -> &CORE_1_STATUSTABLE1

0x480 - Status register of world switch of entry 1

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pub fn core_1_statustable2(&self) -> &CORE_1_STATUSTABLE2

0x484 - Status register of world switch of entry 2

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pub fn core_1_statustable3(&self) -> &CORE_1_STATUSTABLE3

0x488 - Status register of world switch of entry 3

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pub fn core_1_statustable4(&self) -> &CORE_1_STATUSTABLE4

0x48c - Status register of world switch of entry 4

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pub fn core_1_statustable5(&self) -> &CORE_1_STATUSTABLE5

0x490 - Status register of world switch of entry 5

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pub fn core_1_statustable6(&self) -> &CORE_1_STATUSTABLE6

0x494 - Status register of world switch of entry 6

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pub fn core_1_statustable7(&self) -> &CORE_1_STATUSTABLE7

0x498 - Status register of world switch of entry 7

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pub fn core_1_statustable8(&self) -> &CORE_1_STATUSTABLE8

0x49c - Status register of world switch of entry 8

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pub fn core_1_statustable9(&self) -> &CORE_1_STATUSTABLE9

0x4a0 - Status register of world switch of entry 9

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pub fn core_1_statustable10(&self) -> &CORE_1_STATUSTABLE10

0x4a4 - Status register of world switch of entry 10

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pub fn core_1_statustable11(&self) -> &CORE_1_STATUSTABLE11

0x4a8 - Status register of world switch of entry 11

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pub fn core_1_statustable12(&self) -> &CORE_1_STATUSTABLE12

0x4ac - Status register of world switch of entry 12

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pub fn core_1_statustable13(&self) -> &CORE_1_STATUSTABLE13

0x4b0 - Status register of world switch of entry 13

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pub fn core_1_statustable_current(&self) -> &CORE_1_STATUSTABLE_CURRENT

0x4fc - Status register of statustable current

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pub fn core_1_message_addr(&self) -> &CORE_1_MESSAGE_ADDR

0x500 - Clear writer_buffer write address configuration register

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pub fn core_1_message_max(&self) -> &CORE_1_MESSAGE_MAX

0x504 - Clear writer_buffer write number configuration register

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pub fn core_1_message_phase(&self) -> &CORE_1_MESSAGE_PHASE

0x508 - Clear writer_buffer status register

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pub fn core_1_world_trigger_addr(&self) -> &CORE_1_WORLD_TRIGGER_ADDR

0x540 - Core_1 trigger address configuration Register

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pub fn core_1_world_prepare(&self) -> &CORE_1_WORLD_PREPARE

0x544 - Core_1 prepare world configuration Register

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pub fn core_1_world_update(&self) -> &CORE_1_WORLD_UPDATE

0x548 - Core_1 configuration update register

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pub fn core_1_world_cancel(&self) -> &CORE_1_WORLD_CANCEL

0x54c - Core_1 configuration cancel register

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pub fn core_1_world_iram0(&self) -> &CORE_1_WORLD_IRAM0

0x550 - Core_1 Iram0 world register

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pub fn core_1_world_dram0_pif(&self) -> &CORE_1_WORLD_DRAM0_PIF

0x554 - Core_1 dram0 and PIF world register

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pub fn core_1_world_phase(&self) -> &CORE_1_WORLD_PHASE

0x558 - Core_0 world status register

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pub fn core_1_nmi_mask_enable(&self) -> &CORE_1_NMI_MASK_ENABLE

0x580 - Core_1 NMI mask enable register

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pub fn core_1_nmi_mask_trigger_addr(&self) -> &CORE_1_NMI_MASK_TRIGGER_ADDR

0x584 - Core_1 NMI mask trigger addr register

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pub fn core_1_nmi_mask_disable(&self) -> &CORE_1_NMI_MASK_DISABLE

0x588 - Core_1 NMI mask disable register

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pub fn core_1_nmi_mask_cancle(&self) -> &CORE_1_NMI_MASK_CANCLE

0x58c - Core_1 NMI mask disable register

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pub fn core_1_nmi_mask(&self) -> &CORE_1_NMI_MASK

0x590 - Core_1 NMI mask register

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pub fn core_1_nmi_mask_phase(&self) -> &CORE_1_NMI_MASK_PHASE

0x594 - Core_1 NMI mask phase register

Trait Implementations§

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impl Debug for WCL

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fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter. Read more
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impl Deref for WCL

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type Target = RegisterBlock

The resulting type after dereferencing.
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fn deref(&self) -> &Self::Target

Dereferences the value.
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impl Send for WCL

Auto Trait Implementations§

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impl Freeze for WCL

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impl RefUnwindSafe for WCL

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impl !Sync for WCL

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impl Unpin for WCL

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impl UnwindSafe for WCL

Blanket Implementations§

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impl<T> Any for T
where T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more
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impl<T> Borrow<T> for T
where T: ?Sized,

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fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more
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impl<T> BorrowMut<T> for T
where T: ?Sized,

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fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more
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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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impl<T, U> Into<U> for T
where U: From<T>,

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fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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impl<P, T> Receiver for P
where P: Deref<Target = T> + ?Sized, T: ?Sized,

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type Target = T

🔬This is a nightly-only experimental API. (arbitrary_self_types)
The target type on which the method may be called.
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impl<T, U> TryFrom<U> for T
where U: Into<T>,

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type Error = Infallible

The type returned in the event of a conversion error.
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fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

Performs the conversion.
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impl<T, U> TryInto<U> for T
where U: TryFrom<T>,

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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.
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fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>

Performs the conversion.