1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 pro_mac_intr_map: PRO_MAC_INTR_MAP,
6 mac_nmi_map: MAC_NMI_MAP,
7 pwr_intr_map: PWR_INTR_MAP,
8 bb_int_map: BB_INT_MAP,
9 bt_mac_int_map: BT_MAC_INT_MAP,
10 bt_bb_int_map: BT_BB_INT_MAP,
11 bt_bb_nmi_map: BT_BB_NMI_MAP,
12 rwbt_irq_map: RWBT_IRQ_MAP,
13 rwble_irq_map: RWBLE_IRQ_MAP,
14 rwbt_nmi_map: RWBT_NMI_MAP,
15 rwble_nmi_map: RWBLE_NMI_MAP,
16 i2c_mst_int_map: I2C_MST_INT_MAP,
17 slc0_intr_map: SLC0_INTR_MAP,
18 slc1_intr_map: SLC1_INTR_MAP,
19 uhci0_intr_map: UHCI0_INTR_MAP,
20 uhci1_intr_map: UHCI1_INTR_MAP,
21 gpio_interrupt_pro_map: GPIO_INTERRUPT_PRO_MAP,
22 gpio_interrupt_pro_nmi_map: GPIO_INTERRUPT_PRO_NMI_MAP,
23 gpio_interrupt_app_map: GPIO_INTERRUPT_APP_MAP,
24 gpio_interrupt_app_nmi_map: GPIO_INTERRUPT_APP_NMI_MAP,
25 spi_intr_1_map: SPI_INTR_1_MAP,
26 spi_intr_2_map: SPI_INTR_2_MAP,
27 spi_intr_3_map: SPI_INTR_3_MAP,
28 spi_intr_4_map: SPI_INTR_4_MAP,
29 lcd_cam_int_map: LCD_CAM_INT_MAP,
30 i2s0_int_map: I2S0_INT_MAP,
31 i2s1_int_map: I2S1_INT_MAP,
32 uart_intr_map: UART_INTR_MAP,
33 uart1_intr_map: UART1_INTR_MAP,
34 uart2_intr_map: UART2_INTR_MAP,
35 sdio_host_interrupt_map: SDIO_HOST_INTERRUPT_MAP,
36 pwm0_intr_map: PWM0_INTR_MAP,
37 pwm1_intr_map: PWM1_INTR_MAP,
38 pwm2_intr_map: PWM2_INTR_MAP,
39 pwm3_intr_map: PWM3_INTR_MAP,
40 ledc_int_map: LEDC_INT_MAP,
41 efuse_int_map: EFUSE_INT_MAP,
42 can_int_map: CAN_INT_MAP,
43 usb_intr_map: USB_INTR_MAP,
44 rtc_core_intr_map: RTC_CORE_INTR_MAP,
45 rmt_intr_map: RMT_INTR_MAP,
46 pcnt_intr_map: PCNT_INTR_MAP,
47 i2c_ext0_intr_map: I2C_EXT0_INTR_MAP,
48 i2c_ext1_intr_map: I2C_EXT1_INTR_MAP,
49 spi2_dma_int_map: SPI2_DMA_INT_MAP,
50 spi3_dma_int_map: SPI3_DMA_INT_MAP,
51 spi4_dma_int_map: SPI4_DMA_INT_MAP,
52 wdg_int_map: WDG_INT_MAP,
53 timer_int1_map: TIMER_INT1_MAP,
54 timer_int2_map: TIMER_INT2_MAP,
55 tg_t0_int_map: TG_T0_INT_MAP,
56 tg_t1_int_map: TG_T1_INT_MAP,
57 tg_wdt_int_map: TG_WDT_INT_MAP,
58 tg1_t0_int_map: TG1_T0_INT_MAP,
59 tg1_t1_int_map: TG1_T1_INT_MAP,
60 tg1_wdt_int_map: TG1_WDT_INT_MAP,
61 cache_ia_int_map: CACHE_IA_INT_MAP,
62 systimer_target0_int_map: SYSTIMER_TARGET0_INT_MAP,
63 systimer_target1_int_map: SYSTIMER_TARGET1_INT_MAP,
64 systimer_target2_int_map: SYSTIMER_TARGET2_INT_MAP,
65 spi_mem_reject_intr_map: SPI_MEM_REJECT_INTR_MAP,
66 dcache_preload_int_map: DCACHE_PRELOAD_INT_MAP,
67 icache_preload_int_map: ICACHE_PRELOAD_INT_MAP,
68 dcache_sync_int_map: DCACHE_SYNC_INT_MAP,
69 icache_sync_int_map: ICACHE_SYNC_INT_MAP,
70 apb_adc_int_map: APB_ADC_INT_MAP,
71 dma_in_ch0_int_map: DMA_IN_CH0_INT_MAP,
72 dma_in_ch1_int_map: DMA_IN_CH1_INT_MAP,
73 dma_in_ch2_int_map: DMA_IN_CH2_INT_MAP,
74 dma_in_ch3_int_map: DMA_IN_CH3_INT_MAP,
75 dma_in_ch4_int_map: DMA_IN_CH4_INT_MAP,
76 dma_out_ch0_int_map: DMA_OUT_CH0_INT_MAP,
77 dma_out_ch1_int_map: DMA_OUT_CH1_INT_MAP,
78 dma_out_ch2_int_map: DMA_OUT_CH2_INT_MAP,
79 dma_out_ch3_int_map: DMA_OUT_CH3_INT_MAP,
80 dma_out_ch4_int_map: DMA_OUT_CH4_INT_MAP,
81 rsa_int_map: RSA_INT_MAP,
82 aes_int_map: AES_INT_MAP,
83 sha_int_map: SHA_INT_MAP,
84 cpu_intr_from_cpu_0_map: CPU_INTR_FROM_CPU_0_MAP,
85 cpu_intr_from_cpu_1_map: CPU_INTR_FROM_CPU_1_MAP,
86 cpu_intr_from_cpu_2_map: CPU_INTR_FROM_CPU_2_MAP,
87 cpu_intr_from_cpu_3_map: CPU_INTR_FROM_CPU_3_MAP,
88 assist_debug_intr_map: ASSIST_DEBUG_INTR_MAP,
89 dma_apbperi_pms_monitor_violate_intr_map: DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP,
90 core_0_iram0_pms_monitor_violate_intr_map: CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP,
91 core_0_dram0_pms_monitor_violate_intr_map: CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP,
92 core_0_pif_pms_monitor_violate_intr_map: CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP,
93 core_0_pif_pms_monitor_violate_size_intr_map: CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP,
94 core_1_iram0_pms_monitor_violate_intr_map: CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP,
95 core_1_dram0_pms_monitor_violate_intr_map: CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP,
96 core_1_pif_pms_monitor_violate_intr_map: CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP,
97 core_1_pif_pms_monitor_violate_size_intr_map: CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP,
98 backup_pms_violate_intr_map: BACKUP_PMS_VIOLATE_INTR_MAP,
99 cache_core0_acs_int_map: CACHE_CORE0_ACS_INT_MAP,
100 cache_core1_acs_int_map: CACHE_CORE1_ACS_INT_MAP,
101 usb_device_int_map: USB_DEVICE_INT_MAP,
102 peri_backup_int_map: PERI_BACKUP_INT_MAP,
103 dma_extmem_reject_int_map: DMA_EXTMEM_REJECT_INT_MAP,
104 pro_intr_status_0: PRO_INTR_STATUS_0,
105 pro_intr_status_1: PRO_INTR_STATUS_1,
106 pro_intr_status_2: PRO_INTR_STATUS_2,
107 pro_intr_status_3: PRO_INTR_STATUS_3,
108 clock_gate: CLOCK_GATE,
109 _reserved104: [u8; 0x065c],
110 date: DATE,
111}
112impl RegisterBlock {
113 #[doc = "0x00 - mac interrupt configuration register"]
114 #[inline(always)]
115 pub const fn pro_mac_intr_map(&self) -> &PRO_MAC_INTR_MAP {
116 &self.pro_mac_intr_map
117 }
118 #[doc = "0x04 - mac_nmi interrupt configuration register"]
119 #[inline(always)]
120 pub const fn mac_nmi_map(&self) -> &MAC_NMI_MAP {
121 &self.mac_nmi_map
122 }
123 #[doc = "0x08 - pwr interrupt configuration register"]
124 #[inline(always)]
125 pub const fn pwr_intr_map(&self) -> &PWR_INTR_MAP {
126 &self.pwr_intr_map
127 }
128 #[doc = "0x0c - bb interrupt configuration register"]
129 #[inline(always)]
130 pub const fn bb_int_map(&self) -> &BB_INT_MAP {
131 &self.bb_int_map
132 }
133 #[doc = "0x10 - bb_mac interrupt configuration register"]
134 #[inline(always)]
135 pub const fn bt_mac_int_map(&self) -> &BT_MAC_INT_MAP {
136 &self.bt_mac_int_map
137 }
138 #[doc = "0x14 - bt_bb interrupt configuration register"]
139 #[inline(always)]
140 pub const fn bt_bb_int_map(&self) -> &BT_BB_INT_MAP {
141 &self.bt_bb_int_map
142 }
143 #[doc = "0x18 - bt_bb_nmi interrupt configuration register"]
144 #[inline(always)]
145 pub const fn bt_bb_nmi_map(&self) -> &BT_BB_NMI_MAP {
146 &self.bt_bb_nmi_map
147 }
148 #[doc = "0x1c - rwbt_irq interrupt configuration register"]
149 #[inline(always)]
150 pub const fn rwbt_irq_map(&self) -> &RWBT_IRQ_MAP {
151 &self.rwbt_irq_map
152 }
153 #[doc = "0x20 - rwble_irq interrupt configuration register"]
154 #[inline(always)]
155 pub const fn rwble_irq_map(&self) -> &RWBLE_IRQ_MAP {
156 &self.rwble_irq_map
157 }
158 #[doc = "0x24 - rwbt_nmi interrupt configuration register"]
159 #[inline(always)]
160 pub const fn rwbt_nmi_map(&self) -> &RWBT_NMI_MAP {
161 &self.rwbt_nmi_map
162 }
163 #[doc = "0x28 - rwble_nmi interrupt configuration register"]
164 #[inline(always)]
165 pub const fn rwble_nmi_map(&self) -> &RWBLE_NMI_MAP {
166 &self.rwble_nmi_map
167 }
168 #[doc = "0x2c - i2c_mst interrupt configuration register"]
169 #[inline(always)]
170 pub const fn i2c_mst_int_map(&self) -> &I2C_MST_INT_MAP {
171 &self.i2c_mst_int_map
172 }
173 #[doc = "0x30 - slc0 interrupt configuration register"]
174 #[inline(always)]
175 pub const fn slc0_intr_map(&self) -> &SLC0_INTR_MAP {
176 &self.slc0_intr_map
177 }
178 #[doc = "0x34 - slc1 interrupt configuration register"]
179 #[inline(always)]
180 pub const fn slc1_intr_map(&self) -> &SLC1_INTR_MAP {
181 &self.slc1_intr_map
182 }
183 #[doc = "0x38 - uhci0 interrupt configuration register"]
184 #[inline(always)]
185 pub const fn uhci0_intr_map(&self) -> &UHCI0_INTR_MAP {
186 &self.uhci0_intr_map
187 }
188 #[doc = "0x3c - uhci1 interrupt configuration register"]
189 #[inline(always)]
190 pub const fn uhci1_intr_map(&self) -> &UHCI1_INTR_MAP {
191 &self.uhci1_intr_map
192 }
193 #[doc = "0x40 - gpio_interrupt_pro interrupt configuration register"]
194 #[inline(always)]
195 pub const fn gpio_interrupt_pro_map(&self) -> &GPIO_INTERRUPT_PRO_MAP {
196 &self.gpio_interrupt_pro_map
197 }
198 #[doc = "0x44 - gpio_interrupt_pro_nmi interrupt configuration register"]
199 #[inline(always)]
200 pub const fn gpio_interrupt_pro_nmi_map(&self) -> &GPIO_INTERRUPT_PRO_NMI_MAP {
201 &self.gpio_interrupt_pro_nmi_map
202 }
203 #[doc = "0x48 - gpio_interrupt_app interrupt configuration register"]
204 #[inline(always)]
205 pub const fn gpio_interrupt_app_map(&self) -> &GPIO_INTERRUPT_APP_MAP {
206 &self.gpio_interrupt_app_map
207 }
208 #[doc = "0x4c - gpio_interrupt_app_nmi interrupt configuration register"]
209 #[inline(always)]
210 pub const fn gpio_interrupt_app_nmi_map(&self) -> &GPIO_INTERRUPT_APP_NMI_MAP {
211 &self.gpio_interrupt_app_nmi_map
212 }
213 #[doc = "0x50 - spi_intr_1 interrupt configuration register"]
214 #[inline(always)]
215 pub const fn spi_intr_1_map(&self) -> &SPI_INTR_1_MAP {
216 &self.spi_intr_1_map
217 }
218 #[doc = "0x54 - spi_intr_2 interrupt configuration register"]
219 #[inline(always)]
220 pub const fn spi_intr_2_map(&self) -> &SPI_INTR_2_MAP {
221 &self.spi_intr_2_map
222 }
223 #[doc = "0x58 - spi_intr_3 interrupt configuration register"]
224 #[inline(always)]
225 pub const fn spi_intr_3_map(&self) -> &SPI_INTR_3_MAP {
226 &self.spi_intr_3_map
227 }
228 #[doc = "0x5c - spi_intr_4 interrupt configuration register"]
229 #[inline(always)]
230 pub const fn spi_intr_4_map(&self) -> &SPI_INTR_4_MAP {
231 &self.spi_intr_4_map
232 }
233 #[doc = "0x60 - lcd_cam interrupt configuration register"]
234 #[inline(always)]
235 pub const fn lcd_cam_int_map(&self) -> &LCD_CAM_INT_MAP {
236 &self.lcd_cam_int_map
237 }
238 #[doc = "0x64 - i2s0 interrupt configuration register"]
239 #[inline(always)]
240 pub const fn i2s0_int_map(&self) -> &I2S0_INT_MAP {
241 &self.i2s0_int_map
242 }
243 #[doc = "0x68 - i2s1 interrupt configuration register"]
244 #[inline(always)]
245 pub const fn i2s1_int_map(&self) -> &I2S1_INT_MAP {
246 &self.i2s1_int_map
247 }
248 #[doc = "0x6c - uart interrupt configuration register"]
249 #[inline(always)]
250 pub const fn uart_intr_map(&self) -> &UART_INTR_MAP {
251 &self.uart_intr_map
252 }
253 #[doc = "0x70 - uart1 interrupt configuration register"]
254 #[inline(always)]
255 pub const fn uart1_intr_map(&self) -> &UART1_INTR_MAP {
256 &self.uart1_intr_map
257 }
258 #[doc = "0x74 - uart2 interrupt configuration register"]
259 #[inline(always)]
260 pub const fn uart2_intr_map(&self) -> &UART2_INTR_MAP {
261 &self.uart2_intr_map
262 }
263 #[doc = "0x78 - sdio_host interrupt configuration register"]
264 #[inline(always)]
265 pub const fn sdio_host_interrupt_map(&self) -> &SDIO_HOST_INTERRUPT_MAP {
266 &self.sdio_host_interrupt_map
267 }
268 #[doc = "0x7c - pwm0 interrupt configuration register"]
269 #[inline(always)]
270 pub const fn pwm0_intr_map(&self) -> &PWM0_INTR_MAP {
271 &self.pwm0_intr_map
272 }
273 #[doc = "0x80 - pwm1 interrupt configuration register"]
274 #[inline(always)]
275 pub const fn pwm1_intr_map(&self) -> &PWM1_INTR_MAP {
276 &self.pwm1_intr_map
277 }
278 #[doc = "0x84 - pwm2 interrupt configuration register"]
279 #[inline(always)]
280 pub const fn pwm2_intr_map(&self) -> &PWM2_INTR_MAP {
281 &self.pwm2_intr_map
282 }
283 #[doc = "0x88 - pwm3 interrupt configuration register"]
284 #[inline(always)]
285 pub const fn pwm3_intr_map(&self) -> &PWM3_INTR_MAP {
286 &self.pwm3_intr_map
287 }
288 #[doc = "0x8c - ledc interrupt configuration register"]
289 #[inline(always)]
290 pub const fn ledc_int_map(&self) -> &LEDC_INT_MAP {
291 &self.ledc_int_map
292 }
293 #[doc = "0x90 - efuse interrupt configuration register"]
294 #[inline(always)]
295 pub const fn efuse_int_map(&self) -> &EFUSE_INT_MAP {
296 &self.efuse_int_map
297 }
298 #[doc = "0x94 - can interrupt configuration register"]
299 #[inline(always)]
300 pub const fn can_int_map(&self) -> &CAN_INT_MAP {
301 &self.can_int_map
302 }
303 #[doc = "0x98 - usb interrupt configuration register"]
304 #[inline(always)]
305 pub const fn usb_intr_map(&self) -> &USB_INTR_MAP {
306 &self.usb_intr_map
307 }
308 #[doc = "0x9c - rtc_core interrupt configuration register"]
309 #[inline(always)]
310 pub const fn rtc_core_intr_map(&self) -> &RTC_CORE_INTR_MAP {
311 &self.rtc_core_intr_map
312 }
313 #[doc = "0xa0 - rmt interrupt configuration register"]
314 #[inline(always)]
315 pub const fn rmt_intr_map(&self) -> &RMT_INTR_MAP {
316 &self.rmt_intr_map
317 }
318 #[doc = "0xa4 - pcnt interrupt configuration register"]
319 #[inline(always)]
320 pub const fn pcnt_intr_map(&self) -> &PCNT_INTR_MAP {
321 &self.pcnt_intr_map
322 }
323 #[doc = "0xa8 - i2c_ext0 interrupt configuration register"]
324 #[inline(always)]
325 pub const fn i2c_ext0_intr_map(&self) -> &I2C_EXT0_INTR_MAP {
326 &self.i2c_ext0_intr_map
327 }
328 #[doc = "0xac - i2c_ext1 interrupt configuration register"]
329 #[inline(always)]
330 pub const fn i2c_ext1_intr_map(&self) -> &I2C_EXT1_INTR_MAP {
331 &self.i2c_ext1_intr_map
332 }
333 #[doc = "0xb0 - spi2_dma interrupt configuration register"]
334 #[inline(always)]
335 pub const fn spi2_dma_int_map(&self) -> &SPI2_DMA_INT_MAP {
336 &self.spi2_dma_int_map
337 }
338 #[doc = "0xb4 - spi3_dma interrupt configuration register"]
339 #[inline(always)]
340 pub const fn spi3_dma_int_map(&self) -> &SPI3_DMA_INT_MAP {
341 &self.spi3_dma_int_map
342 }
343 #[doc = "0xb8 - spi4_dma interrupt configuration register"]
344 #[inline(always)]
345 pub const fn spi4_dma_int_map(&self) -> &SPI4_DMA_INT_MAP {
346 &self.spi4_dma_int_map
347 }
348 #[doc = "0xbc - wdg interrupt configuration register"]
349 #[inline(always)]
350 pub const fn wdg_int_map(&self) -> &WDG_INT_MAP {
351 &self.wdg_int_map
352 }
353 #[doc = "0xc0 - timer_int1 interrupt configuration register"]
354 #[inline(always)]
355 pub const fn timer_int1_map(&self) -> &TIMER_INT1_MAP {
356 &self.timer_int1_map
357 }
358 #[doc = "0xc4 - timer_int2 interrupt configuration register"]
359 #[inline(always)]
360 pub const fn timer_int2_map(&self) -> &TIMER_INT2_MAP {
361 &self.timer_int2_map
362 }
363 #[doc = "0xc8 - tg_t0 interrupt configuration register"]
364 #[inline(always)]
365 pub const fn tg_t0_int_map(&self) -> &TG_T0_INT_MAP {
366 &self.tg_t0_int_map
367 }
368 #[doc = "0xcc - tg_t1 interrupt configuration register"]
369 #[inline(always)]
370 pub const fn tg_t1_int_map(&self) -> &TG_T1_INT_MAP {
371 &self.tg_t1_int_map
372 }
373 #[doc = "0xd0 - tg_wdt interrupt configuration register"]
374 #[inline(always)]
375 pub const fn tg_wdt_int_map(&self) -> &TG_WDT_INT_MAP {
376 &self.tg_wdt_int_map
377 }
378 #[doc = "0xd4 - tg1_t0 interrupt configuration register"]
379 #[inline(always)]
380 pub const fn tg1_t0_int_map(&self) -> &TG1_T0_INT_MAP {
381 &self.tg1_t0_int_map
382 }
383 #[doc = "0xd8 - tg1_t1 interrupt configuration register"]
384 #[inline(always)]
385 pub const fn tg1_t1_int_map(&self) -> &TG1_T1_INT_MAP {
386 &self.tg1_t1_int_map
387 }
388 #[doc = "0xdc - tg1_wdt interrupt configuration register"]
389 #[inline(always)]
390 pub const fn tg1_wdt_int_map(&self) -> &TG1_WDT_INT_MAP {
391 &self.tg1_wdt_int_map
392 }
393 #[doc = "0xe0 - cache_ia interrupt configuration register"]
394 #[inline(always)]
395 pub const fn cache_ia_int_map(&self) -> &CACHE_IA_INT_MAP {
396 &self.cache_ia_int_map
397 }
398 #[doc = "0xe4 - systimer_target0 interrupt configuration register"]
399 #[inline(always)]
400 pub const fn systimer_target0_int_map(&self) -> &SYSTIMER_TARGET0_INT_MAP {
401 &self.systimer_target0_int_map
402 }
403 #[doc = "0xe8 - systimer_target1 interrupt configuration register"]
404 #[inline(always)]
405 pub const fn systimer_target1_int_map(&self) -> &SYSTIMER_TARGET1_INT_MAP {
406 &self.systimer_target1_int_map
407 }
408 #[doc = "0xec - systimer_target2 interrupt configuration register"]
409 #[inline(always)]
410 pub const fn systimer_target2_int_map(&self) -> &SYSTIMER_TARGET2_INT_MAP {
411 &self.systimer_target2_int_map
412 }
413 #[doc = "0xf0 - spi_mem_reject interrupt configuration register"]
414 #[inline(always)]
415 pub const fn spi_mem_reject_intr_map(&self) -> &SPI_MEM_REJECT_INTR_MAP {
416 &self.spi_mem_reject_intr_map
417 }
418 #[doc = "0xf4 - dcache_prelaod interrupt configuration register"]
419 #[inline(always)]
420 pub const fn dcache_preload_int_map(&self) -> &DCACHE_PRELOAD_INT_MAP {
421 &self.dcache_preload_int_map
422 }
423 #[doc = "0xf8 - icache_preload interrupt configuration register"]
424 #[inline(always)]
425 pub const fn icache_preload_int_map(&self) -> &ICACHE_PRELOAD_INT_MAP {
426 &self.icache_preload_int_map
427 }
428 #[doc = "0xfc - dcache_sync interrupt configuration register"]
429 #[inline(always)]
430 pub const fn dcache_sync_int_map(&self) -> &DCACHE_SYNC_INT_MAP {
431 &self.dcache_sync_int_map
432 }
433 #[doc = "0x100 - icache_sync interrupt configuration register"]
434 #[inline(always)]
435 pub const fn icache_sync_int_map(&self) -> &ICACHE_SYNC_INT_MAP {
436 &self.icache_sync_int_map
437 }
438 #[doc = "0x104 - apb_adc interrupt configuration register"]
439 #[inline(always)]
440 pub const fn apb_adc_int_map(&self) -> &APB_ADC_INT_MAP {
441 &self.apb_adc_int_map
442 }
443 #[doc = "0x108 - dma_in_ch0 interrupt configuration register"]
444 #[inline(always)]
445 pub const fn dma_in_ch0_int_map(&self) -> &DMA_IN_CH0_INT_MAP {
446 &self.dma_in_ch0_int_map
447 }
448 #[doc = "0x10c - dma_in_ch1 interrupt configuration register"]
449 #[inline(always)]
450 pub const fn dma_in_ch1_int_map(&self) -> &DMA_IN_CH1_INT_MAP {
451 &self.dma_in_ch1_int_map
452 }
453 #[doc = "0x110 - dma_in_ch2 interrupt configuration register"]
454 #[inline(always)]
455 pub const fn dma_in_ch2_int_map(&self) -> &DMA_IN_CH2_INT_MAP {
456 &self.dma_in_ch2_int_map
457 }
458 #[doc = "0x114 - dma_in_ch3 interrupt configuration register"]
459 #[inline(always)]
460 pub const fn dma_in_ch3_int_map(&self) -> &DMA_IN_CH3_INT_MAP {
461 &self.dma_in_ch3_int_map
462 }
463 #[doc = "0x118 - dma_in_ch4 interrupt configuration register"]
464 #[inline(always)]
465 pub const fn dma_in_ch4_int_map(&self) -> &DMA_IN_CH4_INT_MAP {
466 &self.dma_in_ch4_int_map
467 }
468 #[doc = "0x11c - dma_out_ch0 interrupt configuration register"]
469 #[inline(always)]
470 pub const fn dma_out_ch0_int_map(&self) -> &DMA_OUT_CH0_INT_MAP {
471 &self.dma_out_ch0_int_map
472 }
473 #[doc = "0x120 - dma_out_ch1 interrupt configuration register"]
474 #[inline(always)]
475 pub const fn dma_out_ch1_int_map(&self) -> &DMA_OUT_CH1_INT_MAP {
476 &self.dma_out_ch1_int_map
477 }
478 #[doc = "0x124 - dma_out_ch2 interrupt configuration register"]
479 #[inline(always)]
480 pub const fn dma_out_ch2_int_map(&self) -> &DMA_OUT_CH2_INT_MAP {
481 &self.dma_out_ch2_int_map
482 }
483 #[doc = "0x128 - dma_out_ch3 interrupt configuration register"]
484 #[inline(always)]
485 pub const fn dma_out_ch3_int_map(&self) -> &DMA_OUT_CH3_INT_MAP {
486 &self.dma_out_ch3_int_map
487 }
488 #[doc = "0x12c - dma_out_ch4 interrupt configuration register"]
489 #[inline(always)]
490 pub const fn dma_out_ch4_int_map(&self) -> &DMA_OUT_CH4_INT_MAP {
491 &self.dma_out_ch4_int_map
492 }
493 #[doc = "0x130 - rsa interrupt configuration register"]
494 #[inline(always)]
495 pub const fn rsa_int_map(&self) -> &RSA_INT_MAP {
496 &self.rsa_int_map
497 }
498 #[doc = "0x134 - aes interrupt configuration register"]
499 #[inline(always)]
500 pub const fn aes_int_map(&self) -> &AES_INT_MAP {
501 &self.aes_int_map
502 }
503 #[doc = "0x138 - sha interrupt configuration register"]
504 #[inline(always)]
505 pub const fn sha_int_map(&self) -> &SHA_INT_MAP {
506 &self.sha_int_map
507 }
508 #[doc = "0x13c - cpu_intr_from_cpu_0 interrupt configuration register"]
509 #[inline(always)]
510 pub const fn cpu_intr_from_cpu_0_map(&self) -> &CPU_INTR_FROM_CPU_0_MAP {
511 &self.cpu_intr_from_cpu_0_map
512 }
513 #[doc = "0x140 - cpu_intr_from_cpu_1 interrupt configuration register"]
514 #[inline(always)]
515 pub const fn cpu_intr_from_cpu_1_map(&self) -> &CPU_INTR_FROM_CPU_1_MAP {
516 &self.cpu_intr_from_cpu_1_map
517 }
518 #[doc = "0x144 - cpu_intr_from_cpu_2 interrupt configuration register"]
519 #[inline(always)]
520 pub const fn cpu_intr_from_cpu_2_map(&self) -> &CPU_INTR_FROM_CPU_2_MAP {
521 &self.cpu_intr_from_cpu_2_map
522 }
523 #[doc = "0x148 - cpu_intr_from_cpu_3 interrupt configuration register"]
524 #[inline(always)]
525 pub const fn cpu_intr_from_cpu_3_map(&self) -> &CPU_INTR_FROM_CPU_3_MAP {
526 &self.cpu_intr_from_cpu_3_map
527 }
528 #[doc = "0x14c - assist_debug interrupt configuration register"]
529 #[inline(always)]
530 pub const fn assist_debug_intr_map(&self) -> &ASSIST_DEBUG_INTR_MAP {
531 &self.assist_debug_intr_map
532 }
533 #[doc = "0x150 - dma_pms_monitor_violatile interrupt configuration register"]
534 #[inline(always)]
535 pub const fn dma_apbperi_pms_monitor_violate_intr_map(
536 &self,
537 ) -> &DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP {
538 &self.dma_apbperi_pms_monitor_violate_intr_map
539 }
540 #[doc = "0x154 - core0_IRam0_pms_monitor_violatile interrupt configuration register"]
541 #[inline(always)]
542 pub const fn core_0_iram0_pms_monitor_violate_intr_map(
543 &self,
544 ) -> &CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP {
545 &self.core_0_iram0_pms_monitor_violate_intr_map
546 }
547 #[doc = "0x158 - core0_DRam0_pms_monitor_violatile interrupt configuration register"]
548 #[inline(always)]
549 pub const fn core_0_dram0_pms_monitor_violate_intr_map(
550 &self,
551 ) -> &CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP {
552 &self.core_0_dram0_pms_monitor_violate_intr_map
553 }
554 #[doc = "0x15c - core0_PIF_pms_monitor_violatile interrupt configuration register"]
555 #[inline(always)]
556 pub const fn core_0_pif_pms_monitor_violate_intr_map(
557 &self,
558 ) -> &CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP {
559 &self.core_0_pif_pms_monitor_violate_intr_map
560 }
561 #[doc = "0x160 - core0_PIF_pms_monitor_violatile_size interrupt configuration register"]
562 #[inline(always)]
563 pub const fn core_0_pif_pms_monitor_violate_size_intr_map(
564 &self,
565 ) -> &CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP {
566 &self.core_0_pif_pms_monitor_violate_size_intr_map
567 }
568 #[doc = "0x164 - core1_IRam0_pms_monitor_violatile interrupt configuration register"]
569 #[inline(always)]
570 pub const fn core_1_iram0_pms_monitor_violate_intr_map(
571 &self,
572 ) -> &CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP {
573 &self.core_1_iram0_pms_monitor_violate_intr_map
574 }
575 #[doc = "0x168 - core1_DRam0_pms_monitor_violatile interrupt configuration register"]
576 #[inline(always)]
577 pub const fn core_1_dram0_pms_monitor_violate_intr_map(
578 &self,
579 ) -> &CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP {
580 &self.core_1_dram0_pms_monitor_violate_intr_map
581 }
582 #[doc = "0x16c - core1_PIF_pms_monitor_violatile interrupt configuration register"]
583 #[inline(always)]
584 pub const fn core_1_pif_pms_monitor_violate_intr_map(
585 &self,
586 ) -> &CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP {
587 &self.core_1_pif_pms_monitor_violate_intr_map
588 }
589 #[doc = "0x170 - core1_PIF_pms_monitor_violatile_size interrupt configuration register"]
590 #[inline(always)]
591 pub const fn core_1_pif_pms_monitor_violate_size_intr_map(
592 &self,
593 ) -> &CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP {
594 &self.core_1_pif_pms_monitor_violate_size_intr_map
595 }
596 #[doc = "0x174 - backup_pms_monitor_violatile interrupt configuration register"]
597 #[inline(always)]
598 pub const fn backup_pms_violate_intr_map(&self) -> &BACKUP_PMS_VIOLATE_INTR_MAP {
599 &self.backup_pms_violate_intr_map
600 }
601 #[doc = "0x178 - cache_core0_acs interrupt configuration register"]
602 #[inline(always)]
603 pub const fn cache_core0_acs_int_map(&self) -> &CACHE_CORE0_ACS_INT_MAP {
604 &self.cache_core0_acs_int_map
605 }
606 #[doc = "0x17c - cache_core1_acs interrupt configuration register"]
607 #[inline(always)]
608 pub const fn cache_core1_acs_int_map(&self) -> &CACHE_CORE1_ACS_INT_MAP {
609 &self.cache_core1_acs_int_map
610 }
611 #[doc = "0x180 - usb_device interrupt configuration register"]
612 #[inline(always)]
613 pub const fn usb_device_int_map(&self) -> &USB_DEVICE_INT_MAP {
614 &self.usb_device_int_map
615 }
616 #[doc = "0x184 - peri_backup interrupt configuration register"]
617 #[inline(always)]
618 pub const fn peri_backup_int_map(&self) -> &PERI_BACKUP_INT_MAP {
619 &self.peri_backup_int_map
620 }
621 #[doc = "0x188 - dma_extmem_reject interrupt configuration register"]
622 #[inline(always)]
623 pub const fn dma_extmem_reject_int_map(&self) -> &DMA_EXTMEM_REJECT_INT_MAP {
624 &self.dma_extmem_reject_int_map
625 }
626 #[doc = "0x18c - interrupt status register"]
627 #[inline(always)]
628 pub const fn pro_intr_status_0(&self) -> &PRO_INTR_STATUS_0 {
629 &self.pro_intr_status_0
630 }
631 #[doc = "0x190 - interrupt status register"]
632 #[inline(always)]
633 pub const fn pro_intr_status_1(&self) -> &PRO_INTR_STATUS_1 {
634 &self.pro_intr_status_1
635 }
636 #[doc = "0x194 - interrupt status register"]
637 #[inline(always)]
638 pub const fn pro_intr_status_2(&self) -> &PRO_INTR_STATUS_2 {
639 &self.pro_intr_status_2
640 }
641 #[doc = "0x198 - interrupt status register"]
642 #[inline(always)]
643 pub const fn pro_intr_status_3(&self) -> &PRO_INTR_STATUS_3 {
644 &self.pro_intr_status_3
645 }
646 #[doc = "0x19c - clock gate register"]
647 #[inline(always)]
648 pub const fn clock_gate(&self) -> &CLOCK_GATE {
649 &self.clock_gate
650 }
651 #[doc = "0x7fc - version register"]
652 #[inline(always)]
653 pub const fn date(&self) -> &DATE {
654 &self.date
655 }
656}
657#[doc = "PRO_MAC_INTR_MAP (rw) register accessor: mac interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_mac_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pro_mac_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_mac_intr_map`] module"]
658pub type PRO_MAC_INTR_MAP = crate::Reg<pro_mac_intr_map::PRO_MAC_INTR_MAP_SPEC>;
659#[doc = "mac interrupt configuration register"]
660pub mod pro_mac_intr_map;
661#[doc = "MAC_NMI_MAP (rw) register accessor: mac_nmi interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`mac_nmi_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mac_nmi_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mac_nmi_map`] module"]
662pub type MAC_NMI_MAP = crate::Reg<mac_nmi_map::MAC_NMI_MAP_SPEC>;
663#[doc = "mac_nmi interrupt configuration register"]
664pub mod mac_nmi_map;
665#[doc = "PWR_INTR_MAP (rw) register accessor: pwr interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`pwr_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwr_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwr_intr_map`] module"]
666pub type PWR_INTR_MAP = crate::Reg<pwr_intr_map::PWR_INTR_MAP_SPEC>;
667#[doc = "pwr interrupt configuration register"]
668pub mod pwr_intr_map;
669#[doc = "BB_INT_MAP (rw) register accessor: bb interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`bb_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bb_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bb_int_map`] module"]
670pub type BB_INT_MAP = crate::Reg<bb_int_map::BB_INT_MAP_SPEC>;
671#[doc = "bb interrupt configuration register"]
672pub mod bb_int_map;
673#[doc = "BT_MAC_INT_MAP (rw) register accessor: bb_mac interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`bt_mac_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bt_mac_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bt_mac_int_map`] module"]
674pub type BT_MAC_INT_MAP = crate::Reg<bt_mac_int_map::BT_MAC_INT_MAP_SPEC>;
675#[doc = "bb_mac interrupt configuration register"]
676pub mod bt_mac_int_map;
677#[doc = "BT_BB_INT_MAP (rw) register accessor: bt_bb interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`bt_bb_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bt_bb_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bt_bb_int_map`] module"]
678pub type BT_BB_INT_MAP = crate::Reg<bt_bb_int_map::BT_BB_INT_MAP_SPEC>;
679#[doc = "bt_bb interrupt configuration register"]
680pub mod bt_bb_int_map;
681#[doc = "BT_BB_NMI_MAP (rw) register accessor: bt_bb_nmi interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`bt_bb_nmi_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bt_bb_nmi_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bt_bb_nmi_map`] module"]
682pub type BT_BB_NMI_MAP = crate::Reg<bt_bb_nmi_map::BT_BB_NMI_MAP_SPEC>;
683#[doc = "bt_bb_nmi interrupt configuration register"]
684pub mod bt_bb_nmi_map;
685#[doc = "RWBT_IRQ_MAP (rw) register accessor: rwbt_irq interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`rwbt_irq_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rwbt_irq_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rwbt_irq_map`] module"]
686pub type RWBT_IRQ_MAP = crate::Reg<rwbt_irq_map::RWBT_IRQ_MAP_SPEC>;
687#[doc = "rwbt_irq interrupt configuration register"]
688pub mod rwbt_irq_map;
689#[doc = "RWBLE_IRQ_MAP (rw) register accessor: rwble_irq interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`rwble_irq_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rwble_irq_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rwble_irq_map`] module"]
690pub type RWBLE_IRQ_MAP = crate::Reg<rwble_irq_map::RWBLE_IRQ_MAP_SPEC>;
691#[doc = "rwble_irq interrupt configuration register"]
692pub mod rwble_irq_map;
693#[doc = "RWBT_NMI_MAP (rw) register accessor: rwbt_nmi interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`rwbt_nmi_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rwbt_nmi_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rwbt_nmi_map`] module"]
694pub type RWBT_NMI_MAP = crate::Reg<rwbt_nmi_map::RWBT_NMI_MAP_SPEC>;
695#[doc = "rwbt_nmi interrupt configuration register"]
696pub mod rwbt_nmi_map;
697#[doc = "RWBLE_NMI_MAP (rw) register accessor: rwble_nmi interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`rwble_nmi_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rwble_nmi_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rwble_nmi_map`] module"]
698pub type RWBLE_NMI_MAP = crate::Reg<rwble_nmi_map::RWBLE_NMI_MAP_SPEC>;
699#[doc = "rwble_nmi interrupt configuration register"]
700pub mod rwble_nmi_map;
701#[doc = "I2C_MST_INT_MAP (rw) register accessor: i2c_mst interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c_mst_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c_mst_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c_mst_int_map`] module"]
702pub type I2C_MST_INT_MAP = crate::Reg<i2c_mst_int_map::I2C_MST_INT_MAP_SPEC>;
703#[doc = "i2c_mst interrupt configuration register"]
704pub mod i2c_mst_int_map;
705#[doc = "SLC0_INTR_MAP (rw) register accessor: slc0 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`slc0_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`slc0_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@slc0_intr_map`] module"]
706pub type SLC0_INTR_MAP = crate::Reg<slc0_intr_map::SLC0_INTR_MAP_SPEC>;
707#[doc = "slc0 interrupt configuration register"]
708pub mod slc0_intr_map;
709#[doc = "SLC1_INTR_MAP (rw) register accessor: slc1 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`slc1_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`slc1_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@slc1_intr_map`] module"]
710pub type SLC1_INTR_MAP = crate::Reg<slc1_intr_map::SLC1_INTR_MAP_SPEC>;
711#[doc = "slc1 interrupt configuration register"]
712pub mod slc1_intr_map;
713#[doc = "UHCI0_INTR_MAP (rw) register accessor: uhci0 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`uhci0_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`uhci0_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@uhci0_intr_map`] module"]
714pub type UHCI0_INTR_MAP = crate::Reg<uhci0_intr_map::UHCI0_INTR_MAP_SPEC>;
715#[doc = "uhci0 interrupt configuration register"]
716pub mod uhci0_intr_map;
717#[doc = "UHCI1_INTR_MAP (rw) register accessor: uhci1 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`uhci1_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`uhci1_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@uhci1_intr_map`] module"]
718pub type UHCI1_INTR_MAP = crate::Reg<uhci1_intr_map::UHCI1_INTR_MAP_SPEC>;
719#[doc = "uhci1 interrupt configuration register"]
720pub mod uhci1_intr_map;
721#[doc = "GPIO_INTERRUPT_PRO_MAP (rw) register accessor: gpio_interrupt_pro interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`gpio_interrupt_pro_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gpio_interrupt_pro_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio_interrupt_pro_map`] module"]
722pub type GPIO_INTERRUPT_PRO_MAP = crate::Reg<gpio_interrupt_pro_map::GPIO_INTERRUPT_PRO_MAP_SPEC>;
723#[doc = "gpio_interrupt_pro interrupt configuration register"]
724pub mod gpio_interrupt_pro_map;
725#[doc = "GPIO_INTERRUPT_PRO_NMI_MAP (rw) register accessor: gpio_interrupt_pro_nmi interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`gpio_interrupt_pro_nmi_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gpio_interrupt_pro_nmi_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio_interrupt_pro_nmi_map`] module"]
726pub type GPIO_INTERRUPT_PRO_NMI_MAP =
727 crate::Reg<gpio_interrupt_pro_nmi_map::GPIO_INTERRUPT_PRO_NMI_MAP_SPEC>;
728#[doc = "gpio_interrupt_pro_nmi interrupt configuration register"]
729pub mod gpio_interrupt_pro_nmi_map;
730#[doc = "GPIO_INTERRUPT_APP_MAP (rw) register accessor: gpio_interrupt_app interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`gpio_interrupt_app_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gpio_interrupt_app_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio_interrupt_app_map`] module"]
731pub type GPIO_INTERRUPT_APP_MAP = crate::Reg<gpio_interrupt_app_map::GPIO_INTERRUPT_APP_MAP_SPEC>;
732#[doc = "gpio_interrupt_app interrupt configuration register"]
733pub mod gpio_interrupt_app_map;
734#[doc = "GPIO_INTERRUPT_APP_NMI_MAP (rw) register accessor: gpio_interrupt_app_nmi interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`gpio_interrupt_app_nmi_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gpio_interrupt_app_nmi_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gpio_interrupt_app_nmi_map`] module"]
735pub type GPIO_INTERRUPT_APP_NMI_MAP =
736 crate::Reg<gpio_interrupt_app_nmi_map::GPIO_INTERRUPT_APP_NMI_MAP_SPEC>;
737#[doc = "gpio_interrupt_app_nmi interrupt configuration register"]
738pub mod gpio_interrupt_app_nmi_map;
739#[doc = "SPI_INTR_1_MAP (rw) register accessor: spi_intr_1 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`spi_intr_1_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi_intr_1_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_intr_1_map`] module"]
740pub type SPI_INTR_1_MAP = crate::Reg<spi_intr_1_map::SPI_INTR_1_MAP_SPEC>;
741#[doc = "spi_intr_1 interrupt configuration register"]
742pub mod spi_intr_1_map;
743#[doc = "SPI_INTR_2_MAP (rw) register accessor: spi_intr_2 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`spi_intr_2_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi_intr_2_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_intr_2_map`] module"]
744pub type SPI_INTR_2_MAP = crate::Reg<spi_intr_2_map::SPI_INTR_2_MAP_SPEC>;
745#[doc = "spi_intr_2 interrupt configuration register"]
746pub mod spi_intr_2_map;
747#[doc = "SPI_INTR_3_MAP (rw) register accessor: spi_intr_3 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`spi_intr_3_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi_intr_3_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_intr_3_map`] module"]
748pub type SPI_INTR_3_MAP = crate::Reg<spi_intr_3_map::SPI_INTR_3_MAP_SPEC>;
749#[doc = "spi_intr_3 interrupt configuration register"]
750pub mod spi_intr_3_map;
751#[doc = "SPI_INTR_4_MAP (rw) register accessor: spi_intr_4 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`spi_intr_4_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi_intr_4_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_intr_4_map`] module"]
752pub type SPI_INTR_4_MAP = crate::Reg<spi_intr_4_map::SPI_INTR_4_MAP_SPEC>;
753#[doc = "spi_intr_4 interrupt configuration register"]
754pub mod spi_intr_4_map;
755#[doc = "LCD_CAM_INT_MAP (rw) register accessor: lcd_cam interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`lcd_cam_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`lcd_cam_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@lcd_cam_int_map`] module"]
756pub type LCD_CAM_INT_MAP = crate::Reg<lcd_cam_int_map::LCD_CAM_INT_MAP_SPEC>;
757#[doc = "lcd_cam interrupt configuration register"]
758pub mod lcd_cam_int_map;
759#[doc = "I2S0_INT_MAP (rw) register accessor: i2s0 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2s0_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2s0_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2s0_int_map`] module"]
760pub type I2S0_INT_MAP = crate::Reg<i2s0_int_map::I2S0_INT_MAP_SPEC>;
761#[doc = "i2s0 interrupt configuration register"]
762pub mod i2s0_int_map;
763#[doc = "I2S1_INT_MAP (rw) register accessor: i2s1 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2s1_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2s1_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2s1_int_map`] module"]
764pub type I2S1_INT_MAP = crate::Reg<i2s1_int_map::I2S1_INT_MAP_SPEC>;
765#[doc = "i2s1 interrupt configuration register"]
766pub mod i2s1_int_map;
767#[doc = "UART_INTR_MAP (rw) register accessor: uart interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`uart_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`uart_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@uart_intr_map`] module"]
768pub type UART_INTR_MAP = crate::Reg<uart_intr_map::UART_INTR_MAP_SPEC>;
769#[doc = "uart interrupt configuration register"]
770pub mod uart_intr_map;
771#[doc = "UART1_INTR_MAP (rw) register accessor: uart1 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`uart1_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`uart1_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@uart1_intr_map`] module"]
772pub type UART1_INTR_MAP = crate::Reg<uart1_intr_map::UART1_INTR_MAP_SPEC>;
773#[doc = "uart1 interrupt configuration register"]
774pub mod uart1_intr_map;
775#[doc = "UART2_INTR_MAP (rw) register accessor: uart2 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`uart2_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`uart2_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@uart2_intr_map`] module"]
776pub type UART2_INTR_MAP = crate::Reg<uart2_intr_map::UART2_INTR_MAP_SPEC>;
777#[doc = "uart2 interrupt configuration register"]
778pub mod uart2_intr_map;
779#[doc = "SDIO_HOST_INTERRUPT_MAP (rw) register accessor: sdio_host interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`sdio_host_interrupt_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdio_host_interrupt_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdio_host_interrupt_map`] module"]
780pub type SDIO_HOST_INTERRUPT_MAP =
781 crate::Reg<sdio_host_interrupt_map::SDIO_HOST_INTERRUPT_MAP_SPEC>;
782#[doc = "sdio_host interrupt configuration register"]
783pub mod sdio_host_interrupt_map;
784#[doc = "PWM0_INTR_MAP (rw) register accessor: pwm0 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`pwm0_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwm0_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwm0_intr_map`] module"]
785pub type PWM0_INTR_MAP = crate::Reg<pwm0_intr_map::PWM0_INTR_MAP_SPEC>;
786#[doc = "pwm0 interrupt configuration register"]
787pub mod pwm0_intr_map;
788#[doc = "PWM1_INTR_MAP (rw) register accessor: pwm1 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`pwm1_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwm1_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwm1_intr_map`] module"]
789pub type PWM1_INTR_MAP = crate::Reg<pwm1_intr_map::PWM1_INTR_MAP_SPEC>;
790#[doc = "pwm1 interrupt configuration register"]
791pub mod pwm1_intr_map;
792#[doc = "PWM2_INTR_MAP (rw) register accessor: pwm2 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`pwm2_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwm2_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwm2_intr_map`] module"]
793pub type PWM2_INTR_MAP = crate::Reg<pwm2_intr_map::PWM2_INTR_MAP_SPEC>;
794#[doc = "pwm2 interrupt configuration register"]
795pub mod pwm2_intr_map;
796#[doc = "PWM3_INTR_MAP (rw) register accessor: pwm3 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`pwm3_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwm3_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwm3_intr_map`] module"]
797pub type PWM3_INTR_MAP = crate::Reg<pwm3_intr_map::PWM3_INTR_MAP_SPEC>;
798#[doc = "pwm3 interrupt configuration register"]
799pub mod pwm3_intr_map;
800#[doc = "LEDC_INT_MAP (rw) register accessor: ledc interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`ledc_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ledc_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ledc_int_map`] module"]
801pub type LEDC_INT_MAP = crate::Reg<ledc_int_map::LEDC_INT_MAP_SPEC>;
802#[doc = "ledc interrupt configuration register"]
803pub mod ledc_int_map;
804#[doc = "EFUSE_INT_MAP (rw) register accessor: efuse interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`efuse_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`efuse_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@efuse_int_map`] module"]
805pub type EFUSE_INT_MAP = crate::Reg<efuse_int_map::EFUSE_INT_MAP_SPEC>;
806#[doc = "efuse interrupt configuration register"]
807pub mod efuse_int_map;
808#[doc = "CAN_INT_MAP (rw) register accessor: can interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`can_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`can_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@can_int_map`] module"]
809pub type CAN_INT_MAP = crate::Reg<can_int_map::CAN_INT_MAP_SPEC>;
810#[doc = "can interrupt configuration register"]
811pub mod can_int_map;
812#[doc = "USB_INTR_MAP (rw) register accessor: usb interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`usb_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usb_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usb_intr_map`] module"]
813pub type USB_INTR_MAP = crate::Reg<usb_intr_map::USB_INTR_MAP_SPEC>;
814#[doc = "usb interrupt configuration register"]
815pub mod usb_intr_map;
816#[doc = "RTC_CORE_INTR_MAP (rw) register accessor: rtc_core interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`rtc_core_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rtc_core_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rtc_core_intr_map`] module"]
817pub type RTC_CORE_INTR_MAP = crate::Reg<rtc_core_intr_map::RTC_CORE_INTR_MAP_SPEC>;
818#[doc = "rtc_core interrupt configuration register"]
819pub mod rtc_core_intr_map;
820#[doc = "RMT_INTR_MAP (rw) register accessor: rmt interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`rmt_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rmt_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rmt_intr_map`] module"]
821pub type RMT_INTR_MAP = crate::Reg<rmt_intr_map::RMT_INTR_MAP_SPEC>;
822#[doc = "rmt interrupt configuration register"]
823pub mod rmt_intr_map;
824#[doc = "PCNT_INTR_MAP (rw) register accessor: pcnt interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`pcnt_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcnt_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcnt_intr_map`] module"]
825pub type PCNT_INTR_MAP = crate::Reg<pcnt_intr_map::PCNT_INTR_MAP_SPEC>;
826#[doc = "pcnt interrupt configuration register"]
827pub mod pcnt_intr_map;
828#[doc = "I2C_EXT0_INTR_MAP (rw) register accessor: i2c_ext0 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c_ext0_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c_ext0_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c_ext0_intr_map`] module"]
829pub type I2C_EXT0_INTR_MAP = crate::Reg<i2c_ext0_intr_map::I2C_EXT0_INTR_MAP_SPEC>;
830#[doc = "i2c_ext0 interrupt configuration register"]
831pub mod i2c_ext0_intr_map;
832#[doc = "I2C_EXT1_INTR_MAP (rw) register accessor: i2c_ext1 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c_ext1_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c_ext1_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c_ext1_intr_map`] module"]
833pub type I2C_EXT1_INTR_MAP = crate::Reg<i2c_ext1_intr_map::I2C_EXT1_INTR_MAP_SPEC>;
834#[doc = "i2c_ext1 interrupt configuration register"]
835pub mod i2c_ext1_intr_map;
836#[doc = "SPI2_DMA_INT_MAP (rw) register accessor: spi2_dma interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`spi2_dma_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi2_dma_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi2_dma_int_map`] module"]
837pub type SPI2_DMA_INT_MAP = crate::Reg<spi2_dma_int_map::SPI2_DMA_INT_MAP_SPEC>;
838#[doc = "spi2_dma interrupt configuration register"]
839pub mod spi2_dma_int_map;
840#[doc = "SPI3_DMA_INT_MAP (rw) register accessor: spi3_dma interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`spi3_dma_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi3_dma_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi3_dma_int_map`] module"]
841pub type SPI3_DMA_INT_MAP = crate::Reg<spi3_dma_int_map::SPI3_DMA_INT_MAP_SPEC>;
842#[doc = "spi3_dma interrupt configuration register"]
843pub mod spi3_dma_int_map;
844#[doc = "SPI4_DMA_INT_MAP (rw) register accessor: spi4_dma interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`spi4_dma_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi4_dma_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi4_dma_int_map`] module"]
845pub type SPI4_DMA_INT_MAP = crate::Reg<spi4_dma_int_map::SPI4_DMA_INT_MAP_SPEC>;
846#[doc = "spi4_dma interrupt configuration register"]
847pub mod spi4_dma_int_map;
848#[doc = "WDG_INT_MAP (rw) register accessor: wdg interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`wdg_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`wdg_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdg_int_map`] module"]
849pub type WDG_INT_MAP = crate::Reg<wdg_int_map::WDG_INT_MAP_SPEC>;
850#[doc = "wdg interrupt configuration register"]
851pub mod wdg_int_map;
852#[doc = "TIMER_INT1_MAP (rw) register accessor: timer_int1 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`timer_int1_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer_int1_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer_int1_map`] module"]
853pub type TIMER_INT1_MAP = crate::Reg<timer_int1_map::TIMER_INT1_MAP_SPEC>;
854#[doc = "timer_int1 interrupt configuration register"]
855pub mod timer_int1_map;
856#[doc = "TIMER_INT2_MAP (rw) register accessor: timer_int2 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`timer_int2_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timer_int2_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timer_int2_map`] module"]
857pub type TIMER_INT2_MAP = crate::Reg<timer_int2_map::TIMER_INT2_MAP_SPEC>;
858#[doc = "timer_int2 interrupt configuration register"]
859pub mod timer_int2_map;
860#[doc = "TG_T0_INT_MAP (rw) register accessor: tg_t0 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`tg_t0_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tg_t0_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tg_t0_int_map`] module"]
861pub type TG_T0_INT_MAP = crate::Reg<tg_t0_int_map::TG_T0_INT_MAP_SPEC>;
862#[doc = "tg_t0 interrupt configuration register"]
863pub mod tg_t0_int_map;
864#[doc = "TG_T1_INT_MAP (rw) register accessor: tg_t1 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`tg_t1_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tg_t1_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tg_t1_int_map`] module"]
865pub type TG_T1_INT_MAP = crate::Reg<tg_t1_int_map::TG_T1_INT_MAP_SPEC>;
866#[doc = "tg_t1 interrupt configuration register"]
867pub mod tg_t1_int_map;
868#[doc = "TG_WDT_INT_MAP (rw) register accessor: tg_wdt interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`tg_wdt_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tg_wdt_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tg_wdt_int_map`] module"]
869pub type TG_WDT_INT_MAP = crate::Reg<tg_wdt_int_map::TG_WDT_INT_MAP_SPEC>;
870#[doc = "tg_wdt interrupt configuration register"]
871pub mod tg_wdt_int_map;
872#[doc = "TG1_T0_INT_MAP (rw) register accessor: tg1_t0 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`tg1_t0_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tg1_t0_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tg1_t0_int_map`] module"]
873pub type TG1_T0_INT_MAP = crate::Reg<tg1_t0_int_map::TG1_T0_INT_MAP_SPEC>;
874#[doc = "tg1_t0 interrupt configuration register"]
875pub mod tg1_t0_int_map;
876#[doc = "TG1_T1_INT_MAP (rw) register accessor: tg1_t1 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`tg1_t1_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tg1_t1_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tg1_t1_int_map`] module"]
877pub type TG1_T1_INT_MAP = crate::Reg<tg1_t1_int_map::TG1_T1_INT_MAP_SPEC>;
878#[doc = "tg1_t1 interrupt configuration register"]
879pub mod tg1_t1_int_map;
880#[doc = "TG1_WDT_INT_MAP (rw) register accessor: tg1_wdt interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`tg1_wdt_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tg1_wdt_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tg1_wdt_int_map`] module"]
881pub type TG1_WDT_INT_MAP = crate::Reg<tg1_wdt_int_map::TG1_WDT_INT_MAP_SPEC>;
882#[doc = "tg1_wdt interrupt configuration register"]
883pub mod tg1_wdt_int_map;
884#[doc = "CACHE_IA_INT_MAP (rw) register accessor: cache_ia interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_ia_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_ia_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_ia_int_map`] module"]
885pub type CACHE_IA_INT_MAP = crate::Reg<cache_ia_int_map::CACHE_IA_INT_MAP_SPEC>;
886#[doc = "cache_ia interrupt configuration register"]
887pub mod cache_ia_int_map;
888#[doc = "SYSTIMER_TARGET0_INT_MAP (rw) register accessor: systimer_target0 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`systimer_target0_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systimer_target0_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systimer_target0_int_map`] module"]
889pub type SYSTIMER_TARGET0_INT_MAP =
890 crate::Reg<systimer_target0_int_map::SYSTIMER_TARGET0_INT_MAP_SPEC>;
891#[doc = "systimer_target0 interrupt configuration register"]
892pub mod systimer_target0_int_map;
893#[doc = "SYSTIMER_TARGET1_INT_MAP (rw) register accessor: systimer_target1 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`systimer_target1_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systimer_target1_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systimer_target1_int_map`] module"]
894pub type SYSTIMER_TARGET1_INT_MAP =
895 crate::Reg<systimer_target1_int_map::SYSTIMER_TARGET1_INT_MAP_SPEC>;
896#[doc = "systimer_target1 interrupt configuration register"]
897pub mod systimer_target1_int_map;
898#[doc = "SYSTIMER_TARGET2_INT_MAP (rw) register accessor: systimer_target2 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`systimer_target2_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systimer_target2_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systimer_target2_int_map`] module"]
899pub type SYSTIMER_TARGET2_INT_MAP =
900 crate::Reg<systimer_target2_int_map::SYSTIMER_TARGET2_INT_MAP_SPEC>;
901#[doc = "systimer_target2 interrupt configuration register"]
902pub mod systimer_target2_int_map;
903#[doc = "SPI_MEM_REJECT_INTR_MAP (rw) register accessor: spi_mem_reject interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`spi_mem_reject_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi_mem_reject_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi_mem_reject_intr_map`] module"]
904pub type SPI_MEM_REJECT_INTR_MAP =
905 crate::Reg<spi_mem_reject_intr_map::SPI_MEM_REJECT_INTR_MAP_SPEC>;
906#[doc = "spi_mem_reject interrupt configuration register"]
907pub mod spi_mem_reject_intr_map;
908#[doc = "DCACHE_PRELOAD_INT_MAP (rw) register accessor: dcache_prelaod interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`dcache_preload_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcache_preload_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcache_preload_int_map`] module"]
909pub type DCACHE_PRELOAD_INT_MAP = crate::Reg<dcache_preload_int_map::DCACHE_PRELOAD_INT_MAP_SPEC>;
910#[doc = "dcache_prelaod interrupt configuration register"]
911pub mod dcache_preload_int_map;
912#[doc = "ICACHE_PRELOAD_INT_MAP (rw) register accessor: icache_preload interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_preload_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_preload_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_preload_int_map`] module"]
913pub type ICACHE_PRELOAD_INT_MAP = crate::Reg<icache_preload_int_map::ICACHE_PRELOAD_INT_MAP_SPEC>;
914#[doc = "icache_preload interrupt configuration register"]
915pub mod icache_preload_int_map;
916#[doc = "DCACHE_SYNC_INT_MAP (rw) register accessor: dcache_sync interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`dcache_sync_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dcache_sync_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dcache_sync_int_map`] module"]
917pub type DCACHE_SYNC_INT_MAP = crate::Reg<dcache_sync_int_map::DCACHE_SYNC_INT_MAP_SPEC>;
918#[doc = "dcache_sync interrupt configuration register"]
919pub mod dcache_sync_int_map;
920#[doc = "ICACHE_SYNC_INT_MAP (rw) register accessor: icache_sync interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`icache_sync_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`icache_sync_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@icache_sync_int_map`] module"]
921pub type ICACHE_SYNC_INT_MAP = crate::Reg<icache_sync_int_map::ICACHE_SYNC_INT_MAP_SPEC>;
922#[doc = "icache_sync interrupt configuration register"]
923pub mod icache_sync_int_map;
924#[doc = "APB_ADC_INT_MAP (rw) register accessor: apb_adc interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`apb_adc_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apb_adc_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@apb_adc_int_map`] module"]
925pub type APB_ADC_INT_MAP = crate::Reg<apb_adc_int_map::APB_ADC_INT_MAP_SPEC>;
926#[doc = "apb_adc interrupt configuration register"]
927pub mod apb_adc_int_map;
928#[doc = "DMA_IN_CH0_INT_MAP (rw) register accessor: dma_in_ch0 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_in_ch0_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_in_ch0_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_in_ch0_int_map`] module"]
929pub type DMA_IN_CH0_INT_MAP = crate::Reg<dma_in_ch0_int_map::DMA_IN_CH0_INT_MAP_SPEC>;
930#[doc = "dma_in_ch0 interrupt configuration register"]
931pub mod dma_in_ch0_int_map;
932#[doc = "DMA_IN_CH1_INT_MAP (rw) register accessor: dma_in_ch1 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_in_ch1_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_in_ch1_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_in_ch1_int_map`] module"]
933pub type DMA_IN_CH1_INT_MAP = crate::Reg<dma_in_ch1_int_map::DMA_IN_CH1_INT_MAP_SPEC>;
934#[doc = "dma_in_ch1 interrupt configuration register"]
935pub mod dma_in_ch1_int_map;
936#[doc = "DMA_IN_CH2_INT_MAP (rw) register accessor: dma_in_ch2 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_in_ch2_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_in_ch2_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_in_ch2_int_map`] module"]
937pub type DMA_IN_CH2_INT_MAP = crate::Reg<dma_in_ch2_int_map::DMA_IN_CH2_INT_MAP_SPEC>;
938#[doc = "dma_in_ch2 interrupt configuration register"]
939pub mod dma_in_ch2_int_map;
940#[doc = "DMA_IN_CH3_INT_MAP (rw) register accessor: dma_in_ch3 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_in_ch3_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_in_ch3_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_in_ch3_int_map`] module"]
941pub type DMA_IN_CH3_INT_MAP = crate::Reg<dma_in_ch3_int_map::DMA_IN_CH3_INT_MAP_SPEC>;
942#[doc = "dma_in_ch3 interrupt configuration register"]
943pub mod dma_in_ch3_int_map;
944#[doc = "DMA_IN_CH4_INT_MAP (rw) register accessor: dma_in_ch4 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_in_ch4_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_in_ch4_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_in_ch4_int_map`] module"]
945pub type DMA_IN_CH4_INT_MAP = crate::Reg<dma_in_ch4_int_map::DMA_IN_CH4_INT_MAP_SPEC>;
946#[doc = "dma_in_ch4 interrupt configuration register"]
947pub mod dma_in_ch4_int_map;
948#[doc = "DMA_OUT_CH0_INT_MAP (rw) register accessor: dma_out_ch0 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_out_ch0_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_out_ch0_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_out_ch0_int_map`] module"]
949pub type DMA_OUT_CH0_INT_MAP = crate::Reg<dma_out_ch0_int_map::DMA_OUT_CH0_INT_MAP_SPEC>;
950#[doc = "dma_out_ch0 interrupt configuration register"]
951pub mod dma_out_ch0_int_map;
952#[doc = "DMA_OUT_CH1_INT_MAP (rw) register accessor: dma_out_ch1 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_out_ch1_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_out_ch1_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_out_ch1_int_map`] module"]
953pub type DMA_OUT_CH1_INT_MAP = crate::Reg<dma_out_ch1_int_map::DMA_OUT_CH1_INT_MAP_SPEC>;
954#[doc = "dma_out_ch1 interrupt configuration register"]
955pub mod dma_out_ch1_int_map;
956#[doc = "DMA_OUT_CH2_INT_MAP (rw) register accessor: dma_out_ch2 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_out_ch2_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_out_ch2_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_out_ch2_int_map`] module"]
957pub type DMA_OUT_CH2_INT_MAP = crate::Reg<dma_out_ch2_int_map::DMA_OUT_CH2_INT_MAP_SPEC>;
958#[doc = "dma_out_ch2 interrupt configuration register"]
959pub mod dma_out_ch2_int_map;
960#[doc = "DMA_OUT_CH3_INT_MAP (rw) register accessor: dma_out_ch3 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_out_ch3_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_out_ch3_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_out_ch3_int_map`] module"]
961pub type DMA_OUT_CH3_INT_MAP = crate::Reg<dma_out_ch3_int_map::DMA_OUT_CH3_INT_MAP_SPEC>;
962#[doc = "dma_out_ch3 interrupt configuration register"]
963pub mod dma_out_ch3_int_map;
964#[doc = "DMA_OUT_CH4_INT_MAP (rw) register accessor: dma_out_ch4 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_out_ch4_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_out_ch4_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_out_ch4_int_map`] module"]
965pub type DMA_OUT_CH4_INT_MAP = crate::Reg<dma_out_ch4_int_map::DMA_OUT_CH4_INT_MAP_SPEC>;
966#[doc = "dma_out_ch4 interrupt configuration register"]
967pub mod dma_out_ch4_int_map;
968#[doc = "RSA_INT_MAP (rw) register accessor: rsa interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`rsa_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rsa_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rsa_int_map`] module"]
969pub type RSA_INT_MAP = crate::Reg<rsa_int_map::RSA_INT_MAP_SPEC>;
970#[doc = "rsa interrupt configuration register"]
971pub mod rsa_int_map;
972#[doc = "AES_INT_MAP (rw) register accessor: aes interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`aes_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`aes_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aes_int_map`] module"]
973pub type AES_INT_MAP = crate::Reg<aes_int_map::AES_INT_MAP_SPEC>;
974#[doc = "aes interrupt configuration register"]
975pub mod aes_int_map;
976#[doc = "SHA_INT_MAP (rw) register accessor: sha interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`sha_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sha_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sha_int_map`] module"]
977pub type SHA_INT_MAP = crate::Reg<sha_int_map::SHA_INT_MAP_SPEC>;
978#[doc = "sha interrupt configuration register"]
979pub mod sha_int_map;
980#[doc = "CPU_INTR_FROM_CPU_0_MAP (rw) register accessor: cpu_intr_from_cpu_0 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_intr_from_cpu_0_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_intr_from_cpu_0_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_intr_from_cpu_0_map`] module"]
981pub type CPU_INTR_FROM_CPU_0_MAP =
982 crate::Reg<cpu_intr_from_cpu_0_map::CPU_INTR_FROM_CPU_0_MAP_SPEC>;
983#[doc = "cpu_intr_from_cpu_0 interrupt configuration register"]
984pub mod cpu_intr_from_cpu_0_map;
985#[doc = "CPU_INTR_FROM_CPU_1_MAP (rw) register accessor: cpu_intr_from_cpu_1 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_intr_from_cpu_1_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_intr_from_cpu_1_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_intr_from_cpu_1_map`] module"]
986pub type CPU_INTR_FROM_CPU_1_MAP =
987 crate::Reg<cpu_intr_from_cpu_1_map::CPU_INTR_FROM_CPU_1_MAP_SPEC>;
988#[doc = "cpu_intr_from_cpu_1 interrupt configuration register"]
989pub mod cpu_intr_from_cpu_1_map;
990#[doc = "CPU_INTR_FROM_CPU_2_MAP (rw) register accessor: cpu_intr_from_cpu_2 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_intr_from_cpu_2_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_intr_from_cpu_2_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_intr_from_cpu_2_map`] module"]
991pub type CPU_INTR_FROM_CPU_2_MAP =
992 crate::Reg<cpu_intr_from_cpu_2_map::CPU_INTR_FROM_CPU_2_MAP_SPEC>;
993#[doc = "cpu_intr_from_cpu_2 interrupt configuration register"]
994pub mod cpu_intr_from_cpu_2_map;
995#[doc = "CPU_INTR_FROM_CPU_3_MAP (rw) register accessor: cpu_intr_from_cpu_3 interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_intr_from_cpu_3_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_intr_from_cpu_3_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_intr_from_cpu_3_map`] module"]
996pub type CPU_INTR_FROM_CPU_3_MAP =
997 crate::Reg<cpu_intr_from_cpu_3_map::CPU_INTR_FROM_CPU_3_MAP_SPEC>;
998#[doc = "cpu_intr_from_cpu_3 interrupt configuration register"]
999pub mod cpu_intr_from_cpu_3_map;
1000#[doc = "ASSIST_DEBUG_INTR_MAP (rw) register accessor: assist_debug interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`assist_debug_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`assist_debug_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@assist_debug_intr_map`] module"]
1001pub type ASSIST_DEBUG_INTR_MAP = crate::Reg<assist_debug_intr_map::ASSIST_DEBUG_INTR_MAP_SPEC>;
1002#[doc = "assist_debug interrupt configuration register"]
1003pub mod assist_debug_intr_map;
1004#[doc = "DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP (rw) register accessor: dma_pms_monitor_violatile interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_apbperi_pms_monitor_violate_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_apbperi_pms_monitor_violate_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_apbperi_pms_monitor_violate_intr_map`] module"]
1005pub type DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP = crate::Reg<
1006 dma_apbperi_pms_monitor_violate_intr_map::DMA_APBPERI_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC,
1007>;
1008#[doc = "dma_pms_monitor_violatile interrupt configuration register"]
1009pub mod dma_apbperi_pms_monitor_violate_intr_map;
1010#[doc = "CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP (rw) register accessor: core0_IRam0_pms_monitor_violatile interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_iram0_pms_monitor_violate_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_iram0_pms_monitor_violate_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_iram0_pms_monitor_violate_intr_map`] module"]
1011pub type CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP = crate::Reg<
1012 core_0_iram0_pms_monitor_violate_intr_map::CORE_0_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC,
1013>;
1014#[doc = "core0_IRam0_pms_monitor_violatile interrupt configuration register"]
1015pub mod core_0_iram0_pms_monitor_violate_intr_map;
1016#[doc = "CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP (rw) register accessor: core0_DRam0_pms_monitor_violatile interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_dram0_pms_monitor_violate_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_dram0_pms_monitor_violate_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_dram0_pms_monitor_violate_intr_map`] module"]
1017pub type CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP = crate::Reg<
1018 core_0_dram0_pms_monitor_violate_intr_map::CORE_0_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC,
1019>;
1020#[doc = "core0_DRam0_pms_monitor_violatile interrupt configuration register"]
1021pub mod core_0_dram0_pms_monitor_violate_intr_map;
1022#[doc = "CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP (rw) register accessor: core0_PIF_pms_monitor_violatile interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_pif_pms_monitor_violate_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_pif_pms_monitor_violate_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_pif_pms_monitor_violate_intr_map`] module"]
1023pub type CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP = crate::Reg<
1024 core_0_pif_pms_monitor_violate_intr_map::CORE_0_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC,
1025>;
1026#[doc = "core0_PIF_pms_monitor_violatile interrupt configuration register"]
1027pub mod core_0_pif_pms_monitor_violate_intr_map;
1028#[doc = "CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP (rw) register accessor: core0_PIF_pms_monitor_violatile_size interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_0_pif_pms_monitor_violate_size_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_pif_pms_monitor_violate_size_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_0_pif_pms_monitor_violate_size_intr_map`] module"]
1029pub type CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP = crate::Reg<
1030 core_0_pif_pms_monitor_violate_size_intr_map::CORE_0_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_SPEC,
1031>;
1032#[doc = "core0_PIF_pms_monitor_violatile_size interrupt configuration register"]
1033pub mod core_0_pif_pms_monitor_violate_size_intr_map;
1034#[doc = "CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP (rw) register accessor: core1_IRam0_pms_monitor_violatile interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_1_iram0_pms_monitor_violate_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_1_iram0_pms_monitor_violate_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_1_iram0_pms_monitor_violate_intr_map`] module"]
1035pub type CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP = crate::Reg<
1036 core_1_iram0_pms_monitor_violate_intr_map::CORE_1_IRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC,
1037>;
1038#[doc = "core1_IRam0_pms_monitor_violatile interrupt configuration register"]
1039pub mod core_1_iram0_pms_monitor_violate_intr_map;
1040#[doc = "CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP (rw) register accessor: core1_DRam0_pms_monitor_violatile interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_1_dram0_pms_monitor_violate_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_1_dram0_pms_monitor_violate_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_1_dram0_pms_monitor_violate_intr_map`] module"]
1041pub type CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP = crate::Reg<
1042 core_1_dram0_pms_monitor_violate_intr_map::CORE_1_DRAM0_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC,
1043>;
1044#[doc = "core1_DRam0_pms_monitor_violatile interrupt configuration register"]
1045pub mod core_1_dram0_pms_monitor_violate_intr_map;
1046#[doc = "CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP (rw) register accessor: core1_PIF_pms_monitor_violatile interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_1_pif_pms_monitor_violate_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_1_pif_pms_monitor_violate_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_1_pif_pms_monitor_violate_intr_map`] module"]
1047pub type CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP = crate::Reg<
1048 core_1_pif_pms_monitor_violate_intr_map::CORE_1_PIF_PMS_MONITOR_VIOLATE_INTR_MAP_SPEC,
1049>;
1050#[doc = "core1_PIF_pms_monitor_violatile interrupt configuration register"]
1051pub mod core_1_pif_pms_monitor_violate_intr_map;
1052#[doc = "CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP (rw) register accessor: core1_PIF_pms_monitor_violatile_size interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`core_1_pif_pms_monitor_violate_size_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_1_pif_pms_monitor_violate_size_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@core_1_pif_pms_monitor_violate_size_intr_map`] module"]
1053pub type CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP = crate::Reg<
1054 core_1_pif_pms_monitor_violate_size_intr_map::CORE_1_PIF_PMS_MONITOR_VIOLATE_SIZE_INTR_MAP_SPEC,
1055>;
1056#[doc = "core1_PIF_pms_monitor_violatile_size interrupt configuration register"]
1057pub mod core_1_pif_pms_monitor_violate_size_intr_map;
1058#[doc = "BACKUP_PMS_VIOLATE_INTR_MAP (rw) register accessor: backup_pms_monitor_violatile interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`backup_pms_violate_intr_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`backup_pms_violate_intr_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@backup_pms_violate_intr_map`] module"]
1059pub type BACKUP_PMS_VIOLATE_INTR_MAP =
1060 crate::Reg<backup_pms_violate_intr_map::BACKUP_PMS_VIOLATE_INTR_MAP_SPEC>;
1061#[doc = "backup_pms_monitor_violatile interrupt configuration register"]
1062pub mod backup_pms_violate_intr_map;
1063#[doc = "CACHE_CORE0_ACS_INT_MAP (rw) register accessor: cache_core0_acs interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_core0_acs_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_core0_acs_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_core0_acs_int_map`] module"]
1064pub type CACHE_CORE0_ACS_INT_MAP =
1065 crate::Reg<cache_core0_acs_int_map::CACHE_CORE0_ACS_INT_MAP_SPEC>;
1066#[doc = "cache_core0_acs interrupt configuration register"]
1067pub mod cache_core0_acs_int_map;
1068#[doc = "CACHE_CORE1_ACS_INT_MAP (rw) register accessor: cache_core1_acs interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_core1_acs_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_core1_acs_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_core1_acs_int_map`] module"]
1069pub type CACHE_CORE1_ACS_INT_MAP =
1070 crate::Reg<cache_core1_acs_int_map::CACHE_CORE1_ACS_INT_MAP_SPEC>;
1071#[doc = "cache_core1_acs interrupt configuration register"]
1072pub mod cache_core1_acs_int_map;
1073#[doc = "USB_DEVICE_INT_MAP (rw) register accessor: usb_device interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`usb_device_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usb_device_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usb_device_int_map`] module"]
1074pub type USB_DEVICE_INT_MAP = crate::Reg<usb_device_int_map::USB_DEVICE_INT_MAP_SPEC>;
1075#[doc = "usb_device interrupt configuration register"]
1076pub mod usb_device_int_map;
1077#[doc = "PERI_BACKUP_INT_MAP (rw) register accessor: peri_backup interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`peri_backup_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`peri_backup_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@peri_backup_int_map`] module"]
1078pub type PERI_BACKUP_INT_MAP = crate::Reg<peri_backup_int_map::PERI_BACKUP_INT_MAP_SPEC>;
1079#[doc = "peri_backup interrupt configuration register"]
1080pub mod peri_backup_int_map;
1081#[doc = "DMA_EXTMEM_REJECT_INT_MAP (rw) register accessor: dma_extmem_reject interrupt configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_extmem_reject_int_map::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_extmem_reject_int_map::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dma_extmem_reject_int_map`] module"]
1082pub type DMA_EXTMEM_REJECT_INT_MAP =
1083 crate::Reg<dma_extmem_reject_int_map::DMA_EXTMEM_REJECT_INT_MAP_SPEC>;
1084#[doc = "dma_extmem_reject interrupt configuration register"]
1085pub mod dma_extmem_reject_int_map;
1086#[doc = "PRO_INTR_STATUS_0 (r) register accessor: interrupt status register\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_intr_status_0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_intr_status_0`] module"]
1087pub type PRO_INTR_STATUS_0 = crate::Reg<pro_intr_status_0::PRO_INTR_STATUS_0_SPEC>;
1088#[doc = "interrupt status register"]
1089pub mod pro_intr_status_0;
1090#[doc = "PRO_INTR_STATUS_1 (r) register accessor: interrupt status register\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_intr_status_1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_intr_status_1`] module"]
1091pub type PRO_INTR_STATUS_1 = crate::Reg<pro_intr_status_1::PRO_INTR_STATUS_1_SPEC>;
1092#[doc = "interrupt status register"]
1093pub mod pro_intr_status_1;
1094#[doc = "PRO_INTR_STATUS_2 (r) register accessor: interrupt status register\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_intr_status_2::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_intr_status_2`] module"]
1095pub type PRO_INTR_STATUS_2 = crate::Reg<pro_intr_status_2::PRO_INTR_STATUS_2_SPEC>;
1096#[doc = "interrupt status register"]
1097pub mod pro_intr_status_2;
1098#[doc = "PRO_INTR_STATUS_3 (r) register accessor: interrupt status register\n\nYou can [`read`](crate::Reg::read) this register and get [`pro_intr_status_3::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pro_intr_status_3`] module"]
1099pub type PRO_INTR_STATUS_3 = crate::Reg<pro_intr_status_3::PRO_INTR_STATUS_3_SPEC>;
1100#[doc = "interrupt status register"]
1101pub mod pro_intr_status_3;
1102#[doc = "CLOCK_GATE (rw) register accessor: clock gate register\n\nYou can [`read`](crate::Reg::read) this register and get [`clock_gate::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clock_gate::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clock_gate`] module"]
1103pub type CLOCK_GATE = crate::Reg<clock_gate::CLOCK_GATE_SPEC>;
1104#[doc = "clock gate register"]
1105pub mod clock_gate;
1106#[doc = "DATE (rw) register accessor: version register\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
1107pub type DATE = crate::Reg<date::DATE_SPEC>;
1108#[doc = "version register"]
1109pub mod date;