Module spi1

Source
Expand description

SPI (Serial Peripheral Interface) Controller 1

Modules§

addr
SPI1 address register
cache_fctrl
SPI1 bit mode control register.
clock
SPI_CLK clock division register when SPI1 accesses to flash or Ext_RAM.
clock_gate
SPI1 clk_gate register
cmd
SPI1 memory command register
ctrl
SPI1 control register
ctrl1
SPI1 control1 register
ctrl2
SPI1 control2 register
date
SPI0 version control register
ddr
SPI1 DDR control register
ext_addr
SPI1 extended address register.
flash_sus_cmd
SPI1 flash suspend control register
flash_sus_ctrl
SPI1 flash suspend command register
flash_waiti_ctrl
SPI1 wait idle control register
fsm
SPI1 state machine(FSM) status register.
int_clr
SPI1 interrupt clear register
int_ena
SPI1 interrupt enable register
int_raw
SPI1 interrupt raw register
int_st
SPI1 interrupt status register
misc
SPI1 misc register.
miso_dlen
SPI1 read-data bit length register.
mosi_dlen
SPI1 write-data bit length register.
rd_status
SPI1 read control register.
sus_status
SPI1 flash suspend status register
timing_cali
SPI1 timing compensation register when accesses to flash or Ext_RAM.
tx_crc
SPI1 CRC data register.
user
SPI1 user register.
user1
SPI1 user1 register.
user2
SPI1 user2 register.
w
SPI1 memory data buffer%s

Structs§

RegisterBlock
Register block

Type Aliases§

ADDR
ADDR (rw) register accessor: SPI1 address register
CACHE_FCTRL
CACHE_FCTRL (rw) register accessor: SPI1 bit mode control register.
CLOCK
CLOCK (rw) register accessor: SPI_CLK clock division register when SPI1 accesses to flash or Ext_RAM.
CLOCK_GATE
CLOCK_GATE (rw) register accessor: SPI1 clk_gate register
CMD
CMD (rw) register accessor: SPI1 memory command register
CTRL
CTRL (rw) register accessor: SPI1 control register
CTRL1
CTRL1 (rw) register accessor: SPI1 control1 register
CTRL2
CTRL2 (rw) register accessor: SPI1 control2 register
DATE
DATE (rw) register accessor: SPI0 version control register
DDR
DDR (rw) register accessor: SPI1 DDR control register
EXT_ADDR
EXT_ADDR (rw) register accessor: SPI1 extended address register.
FLASH_SUS_CMD
FLASH_SUS_CMD (rw) register accessor: SPI1 flash suspend control register
FLASH_SUS_CTRL
FLASH_SUS_CTRL (rw) register accessor: SPI1 flash suspend command register
FLASH_WAITI_CTRL
FLASH_WAITI_CTRL (rw) register accessor: SPI1 wait idle control register
FSM
FSM (r) register accessor: SPI1 state machine(FSM) status register.
INT_CLR
INT_CLR (w) register accessor: SPI1 interrupt clear register
INT_ENA
INT_ENA (rw) register accessor: SPI1 interrupt enable register
INT_RAW
INT_RAW (rw) register accessor: SPI1 interrupt raw register
INT_ST
INT_ST (r) register accessor: SPI1 interrupt status register
MISC
MISC (rw) register accessor: SPI1 misc register.
MISO_DLEN
MISO_DLEN (rw) register accessor: SPI1 read-data bit length register.
MOSI_DLEN
MOSI_DLEN (rw) register accessor: SPI1 write-data bit length register.
RD_STATUS
RD_STATUS (rw) register accessor: SPI1 read control register.
SUS_STATUS
SUS_STATUS (rw) register accessor: SPI1 flash suspend status register
TIMING_CALI
TIMING_CALI (rw) register accessor: SPI1 timing compensation register when accesses to flash or Ext_RAM.
TX_CRC
TX_CRC (r) register accessor: SPI1 CRC data register.
USER
USER (rw) register accessor: SPI1 user register.
USER1
USER1 (rw) register accessor: SPI1 user1 register.
USER2
USER2 (rw) register accessor: SPI1 user2 register.
W
W (rw) register accessor: SPI1 memory data buffer%s