esp32s3/sensitive/
dma_apbperi_backup_pms_constrain_1.rs

1#[doc = "Register `DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1` reader"]
2pub type R = crate::R<DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1_SPEC>;
3#[doc = "Register `DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1` writer"]
4pub type W = crate::W<DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1_SPEC>;
5#[doc = "Field `DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_0` reader - backup's permission(store,load) in data region0 of SRAM"]
6pub type DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_0_R = crate::FieldReader;
7#[doc = "Field `DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_0` writer - backup's permission(store,load) in data region0 of SRAM"]
8pub type DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_0_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_1` reader - backup's permission(store,load) in data region1 of SRAM"]
10pub type DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_1_R = crate::FieldReader;
11#[doc = "Field `DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_1` writer - backup's permission(store,load) in data region1 of SRAM"]
12pub type DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_1_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13#[doc = "Field `DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_2` reader - backup's permission(store,load) in data region2 of SRAM"]
14pub type DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_2_R = crate::FieldReader;
15#[doc = "Field `DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_2` writer - backup's permission(store,load) in data region2 of SRAM"]
16pub type DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_2_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
17#[doc = "Field `DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_3` reader - backup's permission(store,load) in data region3 of SRAM"]
18pub type DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_3_R = crate::FieldReader;
19#[doc = "Field `DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_3` writer - backup's permission(store,load) in data region3 of SRAM"]
20pub type DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_3_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
21#[doc = "Field `DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0` reader - backup's permission(store,load) in dcache data sram block0"]
22pub type DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_R = crate::FieldReader;
23#[doc = "Field `DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0` writer - backup's permission(store,load) in dcache data sram block0"]
24pub type DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_W<'a, REG> =
25    crate::FieldWriter<'a, REG, 2>;
26#[doc = "Field `DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1` reader - backup's permission(store,load) in dcache data sram block1"]
27pub type DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_R = crate::FieldReader;
28#[doc = "Field `DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1` writer - backup's permission(store,load) in dcache data sram block1"]
29pub type DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_W<'a, REG> =
30    crate::FieldWriter<'a, REG, 2>;
31impl R {
32    #[doc = "Bits 0:1 - backup's permission(store,load) in data region0 of SRAM"]
33    #[inline(always)]
34    pub fn dma_apbperi_backup_pms_constrain_sram_pms_0(
35        &self,
36    ) -> DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_0_R {
37        DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_0_R::new((self.bits & 3) as u8)
38    }
39    #[doc = "Bits 2:3 - backup's permission(store,load) in data region1 of SRAM"]
40    #[inline(always)]
41    pub fn dma_apbperi_backup_pms_constrain_sram_pms_1(
42        &self,
43    ) -> DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_1_R {
44        DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_1_R::new(((self.bits >> 2) & 3) as u8)
45    }
46    #[doc = "Bits 4:5 - backup's permission(store,load) in data region2 of SRAM"]
47    #[inline(always)]
48    pub fn dma_apbperi_backup_pms_constrain_sram_pms_2(
49        &self,
50    ) -> DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_2_R {
51        DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_2_R::new(((self.bits >> 4) & 3) as u8)
52    }
53    #[doc = "Bits 6:7 - backup's permission(store,load) in data region3 of SRAM"]
54    #[inline(always)]
55    pub fn dma_apbperi_backup_pms_constrain_sram_pms_3(
56        &self,
57    ) -> DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_3_R {
58        DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_3_R::new(((self.bits >> 6) & 3) as u8)
59    }
60    #[doc = "Bits 8:9 - backup's permission(store,load) in dcache data sram block0"]
61    #[inline(always)]
62    pub fn dma_apbperi_backup_pms_constrain_sram_cachedataarray_pms_0(
63        &self,
64    ) -> DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_R {
65        DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_R::new(
66            ((self.bits >> 8) & 3) as u8,
67        )
68    }
69    #[doc = "Bits 10:11 - backup's permission(store,load) in dcache data sram block1"]
70    #[inline(always)]
71    pub fn dma_apbperi_backup_pms_constrain_sram_cachedataarray_pms_1(
72        &self,
73    ) -> DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_R {
74        DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_R::new(
75            ((self.bits >> 10) & 3) as u8,
76        )
77    }
78}
79#[cfg(feature = "impl-register-debug")]
80impl core::fmt::Debug for R {
81    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
82        f.debug_struct("DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1")
83            .field(
84                "dma_apbperi_backup_pms_constrain_sram_pms_0",
85                &self.dma_apbperi_backup_pms_constrain_sram_pms_0(),
86            )
87            .field(
88                "dma_apbperi_backup_pms_constrain_sram_pms_1",
89                &self.dma_apbperi_backup_pms_constrain_sram_pms_1(),
90            )
91            .field(
92                "dma_apbperi_backup_pms_constrain_sram_pms_2",
93                &self.dma_apbperi_backup_pms_constrain_sram_pms_2(),
94            )
95            .field(
96                "dma_apbperi_backup_pms_constrain_sram_pms_3",
97                &self.dma_apbperi_backup_pms_constrain_sram_pms_3(),
98            )
99            .field(
100                "dma_apbperi_backup_pms_constrain_sram_cachedataarray_pms_0",
101                &self.dma_apbperi_backup_pms_constrain_sram_cachedataarray_pms_0(),
102            )
103            .field(
104                "dma_apbperi_backup_pms_constrain_sram_cachedataarray_pms_1",
105                &self.dma_apbperi_backup_pms_constrain_sram_cachedataarray_pms_1(),
106            )
107            .finish()
108    }
109}
110impl W {
111    #[doc = "Bits 0:1 - backup's permission(store,load) in data region0 of SRAM"]
112    #[inline(always)]
113    pub fn dma_apbperi_backup_pms_constrain_sram_pms_0(
114        &mut self,
115    ) -> DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_0_W<DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1_SPEC>
116    {
117        DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_0_W::new(self, 0)
118    }
119    #[doc = "Bits 2:3 - backup's permission(store,load) in data region1 of SRAM"]
120    #[inline(always)]
121    pub fn dma_apbperi_backup_pms_constrain_sram_pms_1(
122        &mut self,
123    ) -> DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_1_W<DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1_SPEC>
124    {
125        DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_1_W::new(self, 2)
126    }
127    #[doc = "Bits 4:5 - backup's permission(store,load) in data region2 of SRAM"]
128    #[inline(always)]
129    pub fn dma_apbperi_backup_pms_constrain_sram_pms_2(
130        &mut self,
131    ) -> DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_2_W<DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1_SPEC>
132    {
133        DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_2_W::new(self, 4)
134    }
135    #[doc = "Bits 6:7 - backup's permission(store,load) in data region3 of SRAM"]
136    #[inline(always)]
137    pub fn dma_apbperi_backup_pms_constrain_sram_pms_3(
138        &mut self,
139    ) -> DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_3_W<DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1_SPEC>
140    {
141        DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_PMS_3_W::new(self, 6)
142    }
143    #[doc = "Bits 8:9 - backup's permission(store,load) in dcache data sram block0"]
144    #[inline(always)]
145    pub fn dma_apbperi_backup_pms_constrain_sram_cachedataarray_pms_0(
146        &mut self,
147    ) -> DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_W<
148        DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1_SPEC,
149    > {
150        DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_0_W::new(self, 8)
151    }
152    #[doc = "Bits 10:11 - backup's permission(store,load) in dcache data sram block1"]
153    #[inline(always)]
154    pub fn dma_apbperi_backup_pms_constrain_sram_cachedataarray_pms_1(
155        &mut self,
156    ) -> DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_W<
157        DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1_SPEC,
158    > {
159        DMA_APBPERI_BACKUP_PMS_CONSTRAIN_SRAM_CACHEDATAARRAY_PMS_1_W::new(self, 10)
160    }
161}
162#[doc = "backup dma permission configuration register 1.\n\nYou can [`read`](crate::Reg::read) this register and get [`dma_apbperi_backup_pms_constrain_1::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dma_apbperi_backup_pms_constrain_1::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
163pub struct DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1_SPEC;
164impl crate::RegisterSpec for DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1_SPEC {
165    type Ux = u32;
166}
167#[doc = "`read()` method returns [`dma_apbperi_backup_pms_constrain_1::R`](R) reader structure"]
168impl crate::Readable for DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1_SPEC {}
169#[doc = "`write(|w| ..)` method takes [`dma_apbperi_backup_pms_constrain_1::W`](W) writer structure"]
170impl crate::Writable for DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1_SPEC {
171    type Safety = crate::Unsafe;
172    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
173    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
174}
175#[doc = "`reset()` method sets DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1 to value 0x0fff"]
176impl crate::Resettable for DMA_APBPERI_BACKUP_PMS_CONSTRAIN_1_SPEC {
177    const RESET_VALUE: u32 = 0x0fff;
178}