esp32s3/sensitive/
backup_bus_pms_constrain_5.rs

1#[doc = "Register `BACKUP_BUS_PMS_CONSTRAIN_5` reader"]
2pub type R = crate::R<BACKUP_BUS_PMS_CONSTRAIN_5_SPEC>;
3#[doc = "Register `BACKUP_BUS_PMS_CONSTRAIN_5` writer"]
4pub type W = crate::W<BACKUP_BUS_PMS_CONSTRAIN_5_SPEC>;
5#[doc = "Field `BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_SPLTADDR` reader - BackUp access rtcfast_spltaddr permission."]
6pub type BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_SPLTADDR_R = crate::FieldReader<u16>;
7#[doc = "Field `BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_SPLTADDR` writer - BackUp access rtcfast_spltaddr permission."]
8pub type BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_SPLTADDR_W<'a, REG> =
9    crate::FieldWriter<'a, REG, 11, u16>;
10impl R {
11    #[doc = "Bits 0:10 - BackUp access rtcfast_spltaddr permission."]
12    #[inline(always)]
13    pub fn backup_bus_pms_constrain_rtcfast_spltaddr(
14        &self,
15    ) -> BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_SPLTADDR_R {
16        BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_SPLTADDR_R::new((self.bits & 0x07ff) as u16)
17    }
18}
19#[cfg(feature = "impl-register-debug")]
20impl core::fmt::Debug for R {
21    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
22        f.debug_struct("BACKUP_BUS_PMS_CONSTRAIN_5")
23            .field(
24                "backup_bus_pms_constrain_rtcfast_spltaddr",
25                &self.backup_bus_pms_constrain_rtcfast_spltaddr(),
26            )
27            .finish()
28    }
29}
30impl W {
31    #[doc = "Bits 0:10 - BackUp access rtcfast_spltaddr permission."]
32    #[inline(always)]
33    pub fn backup_bus_pms_constrain_rtcfast_spltaddr(
34        &mut self,
35    ) -> BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_SPLTADDR_W<BACKUP_BUS_PMS_CONSTRAIN_5_SPEC> {
36        BACKUP_BUS_PMS_CONSTRAIN_RTCFAST_SPLTADDR_W::new(self, 0)
37    }
38}
39#[doc = "BackUp access peripherals permission configuration register 5.\n\nYou can [`read`](crate::Reg::read) this register and get [`backup_bus_pms_constrain_5::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`backup_bus_pms_constrain_5::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
40pub struct BACKUP_BUS_PMS_CONSTRAIN_5_SPEC;
41impl crate::RegisterSpec for BACKUP_BUS_PMS_CONSTRAIN_5_SPEC {
42    type Ux = u32;
43}
44#[doc = "`read()` method returns [`backup_bus_pms_constrain_5::R`](R) reader structure"]
45impl crate::Readable for BACKUP_BUS_PMS_CONSTRAIN_5_SPEC {}
46#[doc = "`write(|w| ..)` method takes [`backup_bus_pms_constrain_5::W`](W) writer structure"]
47impl crate::Writable for BACKUP_BUS_PMS_CONSTRAIN_5_SPEC {
48    type Safety = crate::Unsafe;
49    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
50    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
51}
52#[doc = "`reset()` method sets BACKUP_BUS_PMS_CONSTRAIN_5 to value 0x07ff"]
53impl crate::Resettable for BACKUP_BUS_PMS_CONSTRAIN_5_SPEC {
54    const RESET_VALUE: u32 = 0x07ff;
55}
esp32s3/sensitive/backup_bus_pms_constrain_5.rs

esp32s3/sensitive/
backup_bus_pms_constrain_5.rs
