1#[doc = "Register `PIN%s` reader"]
2pub type R = crate::R<PIN_SPEC>;
3#[doc = "Register `PIN%s` writer"]
4pub type W = crate::W<PIN_SPEC>;
5#[doc = "Field `PAD_DRIVER` reader - if set to 0: normal output, if set to 1: open drain"]
6pub type PAD_DRIVER_R = crate::BitReader;
7#[doc = "Field `PAD_DRIVER` writer - if set to 0: normal output, if set to 1: open drain"]
8pub type PAD_DRIVER_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `INT_TYPE` reader - if set to 0: GPIO interrupt disable, if set to 1: rising edge trigger, if set to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low level trigger, if set to 5: high level trigger"]
10pub type INT_TYPE_R = crate::FieldReader;
11#[doc = "Field `INT_TYPE` writer - if set to 0: GPIO interrupt disable, if set to 1: rising edge trigger, if set to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low level trigger, if set to 5: high level trigger"]
12pub type INT_TYPE_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
13#[doc = "Field `WAKEUP_ENABLE` reader - RTC GPIO wakeup enable bit"]
14pub type WAKEUP_ENABLE_R = crate::BitReader;
15#[doc = "Field `WAKEUP_ENABLE` writer - RTC GPIO wakeup enable bit"]
16pub type WAKEUP_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18 #[doc = "Bit 2 - if set to 0: normal output, if set to 1: open drain"]
19 #[inline(always)]
20 pub fn pad_driver(&self) -> PAD_DRIVER_R {
21 PAD_DRIVER_R::new(((self.bits >> 2) & 1) != 0)
22 }
23 #[doc = "Bits 7:9 - if set to 0: GPIO interrupt disable, if set to 1: rising edge trigger, if set to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low level trigger, if set to 5: high level trigger"]
24 #[inline(always)]
25 pub fn int_type(&self) -> INT_TYPE_R {
26 INT_TYPE_R::new(((self.bits >> 7) & 7) as u8)
27 }
28 #[doc = "Bit 10 - RTC GPIO wakeup enable bit"]
29 #[inline(always)]
30 pub fn wakeup_enable(&self) -> WAKEUP_ENABLE_R {
31 WAKEUP_ENABLE_R::new(((self.bits >> 10) & 1) != 0)
32 }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37 f.debug_struct("PIN")
38 .field("pad_driver", &self.pad_driver())
39 .field("int_type", &self.int_type())
40 .field("wakeup_enable", &self.wakeup_enable())
41 .finish()
42 }
43}
44impl W {
45 #[doc = "Bit 2 - if set to 0: normal output, if set to 1: open drain"]
46 #[inline(always)]
47 pub fn pad_driver(&mut self) -> PAD_DRIVER_W<PIN_SPEC> {
48 PAD_DRIVER_W::new(self, 2)
49 }
50 #[doc = "Bits 7:9 - if set to 0: GPIO interrupt disable, if set to 1: rising edge trigger, if set to 2: falling edge trigger, if set to 3: any edge trigger, if set to 4: low level trigger, if set to 5: high level trigger"]
51 #[inline(always)]
52 pub fn int_type(&mut self) -> INT_TYPE_W<PIN_SPEC> {
53 INT_TYPE_W::new(self, 7)
54 }
55 #[doc = "Bit 10 - RTC GPIO wakeup enable bit"]
56 #[inline(always)]
57 pub fn wakeup_enable(&mut self) -> WAKEUP_ENABLE_W<PIN_SPEC> {
58 WAKEUP_ENABLE_W::new(self, 10)
59 }
60}
61#[doc = "configure RTC GPIO%s\n\nYou can [`read`](crate::Reg::read) this register and get [`pin::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pin::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
62pub struct PIN_SPEC;
63impl crate::RegisterSpec for PIN_SPEC {
64 type Ux = u32;
65}
66#[doc = "`read()` method returns [`pin::R`](R) reader structure"]
67impl crate::Readable for PIN_SPEC {}
68#[doc = "`write(|w| ..)` method takes [`pin::W`](W) writer structure"]
69impl crate::Writable for PIN_SPEC {
70 type Safety = crate::Unsafe;
71 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
73}
74#[doc = "`reset()` method sets PIN%s to value 0"]
75impl crate::Resettable for PIN_SPEC {
76 const RESET_VALUE: u32 = 0;
77}