esp32s3/dma/ch/
outfifo_status.rs

1#[doc = "Register `OUTFIFO_STATUS` reader"]
2pub type R = crate::R<OUTFIFO_STATUS_SPEC>;
3#[doc = "Field `OUTFIFO_FULL_L1` reader - L1 Tx FIFO full signal for Tx channel 0."]
4pub type OUTFIFO_FULL_L1_R = crate::BitReader;
5#[doc = "Field `OUTFIFO_EMPTY_L1` reader - L1 Tx FIFO empty signal for Tx channel 0."]
6pub type OUTFIFO_EMPTY_L1_R = crate::BitReader;
7#[doc = "Field `OUTFIFO_FULL_L2` reader - L2 Tx FIFO full signal for Tx channel 0."]
8pub type OUTFIFO_FULL_L2_R = crate::BitReader;
9#[doc = "Field `OUTFIFO_EMPTY_L2` reader - L2 Tx FIFO empty signal for Tx channel 0."]
10pub type OUTFIFO_EMPTY_L2_R = crate::BitReader;
11#[doc = "Field `OUTFIFO_FULL_L3` reader - L3 Tx FIFO full signal for Tx channel 0."]
12pub type OUTFIFO_FULL_L3_R = crate::BitReader;
13#[doc = "Field `OUTFIFO_EMPTY_L3` reader - L3 Tx FIFO empty signal for Tx channel 0."]
14pub type OUTFIFO_EMPTY_L3_R = crate::BitReader;
15#[doc = "Field `OUTFIFO_CNT_L1` reader - The register stores the byte number of the data in L1 Tx FIFO for Tx channel 0."]
16pub type OUTFIFO_CNT_L1_R = crate::FieldReader;
17#[doc = "Field `OUTFIFO_CNT_L2` reader - The register stores the byte number of the data in L2 Tx FIFO for Tx channel 0."]
18pub type OUTFIFO_CNT_L2_R = crate::FieldReader;
19#[doc = "Field `OUTFIFO_CNT_L3` reader - The register stores the byte number of the data in L3 Tx FIFO for Tx channel 0."]
20pub type OUTFIFO_CNT_L3_R = crate::FieldReader;
21#[doc = "Field `OUT_REMAIN_UNDER_1B_L3` reader - reserved"]
22pub type OUT_REMAIN_UNDER_1B_L3_R = crate::BitReader;
23#[doc = "Field `OUT_REMAIN_UNDER_2B_L3` reader - reserved"]
24pub type OUT_REMAIN_UNDER_2B_L3_R = crate::BitReader;
25#[doc = "Field `OUT_REMAIN_UNDER_3B_L3` reader - reserved"]
26pub type OUT_REMAIN_UNDER_3B_L3_R = crate::BitReader;
27#[doc = "Field `OUT_REMAIN_UNDER_4B_L3` reader - reserved"]
28pub type OUT_REMAIN_UNDER_4B_L3_R = crate::BitReader;
29impl R {
30    #[doc = "Bit 0 - L1 Tx FIFO full signal for Tx channel 0."]
31    #[inline(always)]
32    pub fn outfifo_full_l1(&self) -> OUTFIFO_FULL_L1_R {
33        OUTFIFO_FULL_L1_R::new((self.bits & 1) != 0)
34    }
35    #[doc = "Bit 1 - L1 Tx FIFO empty signal for Tx channel 0."]
36    #[inline(always)]
37    pub fn outfifo_empty_l1(&self) -> OUTFIFO_EMPTY_L1_R {
38        OUTFIFO_EMPTY_L1_R::new(((self.bits >> 1) & 1) != 0)
39    }
40    #[doc = "Bit 2 - L2 Tx FIFO full signal for Tx channel 0."]
41    #[inline(always)]
42    pub fn outfifo_full_l2(&self) -> OUTFIFO_FULL_L2_R {
43        OUTFIFO_FULL_L2_R::new(((self.bits >> 2) & 1) != 0)
44    }
45    #[doc = "Bit 3 - L2 Tx FIFO empty signal for Tx channel 0."]
46    #[inline(always)]
47    pub fn outfifo_empty_l2(&self) -> OUTFIFO_EMPTY_L2_R {
48        OUTFIFO_EMPTY_L2_R::new(((self.bits >> 3) & 1) != 0)
49    }
50    #[doc = "Bit 4 - L3 Tx FIFO full signal for Tx channel 0."]
51    #[inline(always)]
52    pub fn outfifo_full_l3(&self) -> OUTFIFO_FULL_L3_R {
53        OUTFIFO_FULL_L3_R::new(((self.bits >> 4) & 1) != 0)
54    }
55    #[doc = "Bit 5 - L3 Tx FIFO empty signal for Tx channel 0."]
56    #[inline(always)]
57    pub fn outfifo_empty_l3(&self) -> OUTFIFO_EMPTY_L3_R {
58        OUTFIFO_EMPTY_L3_R::new(((self.bits >> 5) & 1) != 0)
59    }
60    #[doc = "Bits 6:10 - The register stores the byte number of the data in L1 Tx FIFO for Tx channel 0."]
61    #[inline(always)]
62    pub fn outfifo_cnt_l1(&self) -> OUTFIFO_CNT_L1_R {
63        OUTFIFO_CNT_L1_R::new(((self.bits >> 6) & 0x1f) as u8)
64    }
65    #[doc = "Bits 11:17 - The register stores the byte number of the data in L2 Tx FIFO for Tx channel 0."]
66    #[inline(always)]
67    pub fn outfifo_cnt_l2(&self) -> OUTFIFO_CNT_L2_R {
68        OUTFIFO_CNT_L2_R::new(((self.bits >> 11) & 0x7f) as u8)
69    }
70    #[doc = "Bits 18:22 - The register stores the byte number of the data in L3 Tx FIFO for Tx channel 0."]
71    #[inline(always)]
72    pub fn outfifo_cnt_l3(&self) -> OUTFIFO_CNT_L3_R {
73        OUTFIFO_CNT_L3_R::new(((self.bits >> 18) & 0x1f) as u8)
74    }
75    #[doc = "Bit 23 - reserved"]
76    #[inline(always)]
77    pub fn out_remain_under_1b_l3(&self) -> OUT_REMAIN_UNDER_1B_L3_R {
78        OUT_REMAIN_UNDER_1B_L3_R::new(((self.bits >> 23) & 1) != 0)
79    }
80    #[doc = "Bit 24 - reserved"]
81    #[inline(always)]
82    pub fn out_remain_under_2b_l3(&self) -> OUT_REMAIN_UNDER_2B_L3_R {
83        OUT_REMAIN_UNDER_2B_L3_R::new(((self.bits >> 24) & 1) != 0)
84    }
85    #[doc = "Bit 25 - reserved"]
86    #[inline(always)]
87    pub fn out_remain_under_3b_l3(&self) -> OUT_REMAIN_UNDER_3B_L3_R {
88        OUT_REMAIN_UNDER_3B_L3_R::new(((self.bits >> 25) & 1) != 0)
89    }
90    #[doc = "Bit 26 - reserved"]
91    #[inline(always)]
92    pub fn out_remain_under_4b_l3(&self) -> OUT_REMAIN_UNDER_4B_L3_R {
93        OUT_REMAIN_UNDER_4B_L3_R::new(((self.bits >> 26) & 1) != 0)
94    }
95}
96#[cfg(feature = "impl-register-debug")]
97impl core::fmt::Debug for R {
98    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
99        f.debug_struct("OUTFIFO_STATUS")
100            .field("outfifo_full_l1", &self.outfifo_full_l1())
101            .field("outfifo_empty_l1", &self.outfifo_empty_l1())
102            .field("outfifo_full_l2", &self.outfifo_full_l2())
103            .field("outfifo_empty_l2", &self.outfifo_empty_l2())
104            .field("outfifo_full_l3", &self.outfifo_full_l3())
105            .field("outfifo_empty_l3", &self.outfifo_empty_l3())
106            .field("outfifo_cnt_l1", &self.outfifo_cnt_l1())
107            .field("outfifo_cnt_l2", &self.outfifo_cnt_l2())
108            .field("outfifo_cnt_l3", &self.outfifo_cnt_l3())
109            .field("out_remain_under_1b_l3", &self.out_remain_under_1b_l3())
110            .field("out_remain_under_2b_l3", &self.out_remain_under_2b_l3())
111            .field("out_remain_under_3b_l3", &self.out_remain_under_3b_l3())
112            .field("out_remain_under_4b_l3", &self.out_remain_under_4b_l3())
113            .finish()
114    }
115}
116#[doc = "Transmit FIFO status of Tx channel 0\n\nYou can [`read`](crate::Reg::read) this register and get [`outfifo_status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
117pub struct OUTFIFO_STATUS_SPEC;
118impl crate::RegisterSpec for OUTFIFO_STATUS_SPEC {
119    type Ux = u32;
120}
121#[doc = "`read()` method returns [`outfifo_status::R`](R) reader structure"]
122impl crate::Readable for OUTFIFO_STATUS_SPEC {}
123#[doc = "`reset()` method sets OUTFIFO_STATUS to value 0x0780_002a"]
124impl crate::Resettable for OUTFIFO_STATUS_SPEC {
125    const RESET_VALUE: u32 = 0x0780_002a;
126}
esp32s3/dma/ch/outfifo_status.rs

esp32s3/dma/ch/
outfifo_status.rs
