esp32s3/wcl/
core_0_nmi_mask_enable.rs

1#[doc = "Register `Core_0_NMI_MASK_ENABLE` writer"]
2pub type W = crate::W<CORE_0_NMI_MASK_ENABLE_SPEC>;
3#[doc = "Field `CORE_0_NMI_MASK_ENABLE` writer - this field is used to set NMI mask,it can write any value,when write this register,the hardware start masking NMI interrupt"]
4pub type CORE_0_NMI_MASK_ENABLE_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
5#[cfg(feature = "impl-register-debug")]
6impl core::fmt::Debug for crate::generic::Reg<CORE_0_NMI_MASK_ENABLE_SPEC> {
7    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
8        write!(f, "(not readable)")
9    }
10}
11impl W {
12    #[doc = "Bits 0:31 - this field is used to set NMI mask,it can write any value,when write this register,the hardware start masking NMI interrupt"]
13    #[inline(always)]
14    pub fn core_0_nmi_mask_enable(
15        &mut self,
16    ) -> CORE_0_NMI_MASK_ENABLE_W<CORE_0_NMI_MASK_ENABLE_SPEC> {
17        CORE_0_NMI_MASK_ENABLE_W::new(self, 0)
18    }
19}
20#[doc = "Core_0 NMI mask enable register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`core_0_nmi_mask_enable::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
21pub struct CORE_0_NMI_MASK_ENABLE_SPEC;
22impl crate::RegisterSpec for CORE_0_NMI_MASK_ENABLE_SPEC {
23    type Ux = u32;
24}
25#[doc = "`write(|w| ..)` method takes [`core_0_nmi_mask_enable::W`](W) writer structure"]
26impl crate::Writable for CORE_0_NMI_MASK_ENABLE_SPEC {
27    type Safety = crate::Unsafe;
28    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
29    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
30}
31#[doc = "`reset()` method sets Core_0_NMI_MASK_ENABLE to value 0"]
32impl crate::Resettable for CORE_0_NMI_MASK_ENABLE_SPEC {
33    const RESET_VALUE: u32 = 0;
34}
esp32s3/wcl/core_0_nmi_mask_enable.rs

esp32s3/wcl/
core_0_nmi_mask_enable.rs
