esp32s3/rmt/
ref_cnt_rst.rs

1#[doc = "Register `REF_CNT_RST` writer"]
2pub type W = crate::W<REF_CNT_RST_SPEC>;
3#[doc = "Field `CH(0-7)` writer - This register is used to reset the clock divider of CHANNEL%s."]
4pub type CH_W<'a, REG> = crate::BitWriter<'a, REG>;
5#[cfg(feature = "impl-register-debug")]
6impl core::fmt::Debug for crate::generic::Reg<REF_CNT_RST_SPEC> {
7    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
8        write!(f, "(not readable)")
9    }
10}
11impl W {
12    #[doc = "This register is used to reset the clock divider of CHANNEL(0-7)."]
13    #[doc = ""]
14    #[doc = "<div class=\"warning\">`n` is number of field in register. `n == 0` corresponds to `CH0` field.</div>"]
15    #[inline(always)]
16    pub fn ch(&mut self, n: u8) -> CH_W<REF_CNT_RST_SPEC> {
17        #[allow(clippy::no_effect)]
18        [(); 8][n as usize];
19        CH_W::new(self, n)
20    }
21    #[doc = "Bit 0 - This register is used to reset the clock divider of CHANNEL0."]
22    #[inline(always)]
23    pub fn ch0(&mut self) -> CH_W<REF_CNT_RST_SPEC> {
24        CH_W::new(self, 0)
25    }
26    #[doc = "Bit 1 - This register is used to reset the clock divider of CHANNEL1."]
27    #[inline(always)]
28    pub fn ch1(&mut self) -> CH_W<REF_CNT_RST_SPEC> {
29        CH_W::new(self, 1)
30    }
31    #[doc = "Bit 2 - This register is used to reset the clock divider of CHANNEL2."]
32    #[inline(always)]
33    pub fn ch2(&mut self) -> CH_W<REF_CNT_RST_SPEC> {
34        CH_W::new(self, 2)
35    }
36    #[doc = "Bit 3 - This register is used to reset the clock divider of CHANNEL3."]
37    #[inline(always)]
38    pub fn ch3(&mut self) -> CH_W<REF_CNT_RST_SPEC> {
39        CH_W::new(self, 3)
40    }
41    #[doc = "Bit 4 - This register is used to reset the clock divider of CHANNEL4."]
42    #[inline(always)]
43    pub fn ch4(&mut self) -> CH_W<REF_CNT_RST_SPEC> {
44        CH_W::new(self, 4)
45    }
46    #[doc = "Bit 5 - This register is used to reset the clock divider of CHANNEL5."]
47    #[inline(always)]
48    pub fn ch5(&mut self) -> CH_W<REF_CNT_RST_SPEC> {
49        CH_W::new(self, 5)
50    }
51    #[doc = "Bit 6 - This register is used to reset the clock divider of CHANNEL6."]
52    #[inline(always)]
53    pub fn ch6(&mut self) -> CH_W<REF_CNT_RST_SPEC> {
54        CH_W::new(self, 6)
55    }
56    #[doc = "Bit 7 - This register is used to reset the clock divider of CHANNEL7."]
57    #[inline(always)]
58    pub fn ch7(&mut self) -> CH_W<REF_CNT_RST_SPEC> {
59        CH_W::new(self, 7)
60    }
61}
62#[doc = "RMT clock divider reset register\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ref_cnt_rst::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
63pub struct REF_CNT_RST_SPEC;
64impl crate::RegisterSpec for REF_CNT_RST_SPEC {
65    type Ux = u32;
66}
67#[doc = "`write(|w| ..)` method takes [`ref_cnt_rst::W`](W) writer structure"]
68impl crate::Writable for REF_CNT_RST_SPEC {
69    type Safety = crate::Unsafe;
70    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
71    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72}
73#[doc = "`reset()` method sets REF_CNT_RST to value 0"]
74impl crate::Resettable for REF_CNT_RST_SPEC {
75    const RESET_VALUE: u32 = 0;
76}
esp32s3/rmt/ref_cnt_rst.rs

esp32s3/rmt/
ref_cnt_rst.rs
