esp32s3/spi0/
ecc_err_bit.rs

1#[doc = "Register `ECC_ERR_BIT` reader"]
2pub type R = crate::R<ECC_ERR_BIT_SPEC>;
3#[doc = "Field `ECC_DATA_ERR_BIT` reader - It records the first ECC data error bit number when SPI_FMEM_ECC_ERR_INT_EN/SPI_SMEM_ECC_ERR_INT_EN is set and accessed to flash/Ext_RAM. The value ranges from 0~127, corresponding to the bit number in 16 data bytes. It is cleared by SPI_MEM_ECC_ERR_INT_CLR bit."]
4pub type ECC_DATA_ERR_BIT_R = crate::FieldReader;
5#[doc = "Field `ECC_CHK_ERR_BIT` reader - When SPI_MEM_ECC_BYTE_ERR is set, these bits show the error bit number of ECC byte."]
6pub type ECC_CHK_ERR_BIT_R = crate::FieldReader;
7#[doc = "Field `ECC_BYTE_ERR` reader - It records the first ECC byte error when SPI_FMEM_ECC_ERR_INT_EN/SPI_SMEM_ECC_ERR_INT_EN is set and accessed to flash/Ext_RAM. It is cleared by SPI_MEM_ECC_ERR_INT_CLR bit."]
8pub type ECC_BYTE_ERR_R = crate::BitReader;
9#[doc = "Field `ECC_ERR_CNT` reader - This bits show the error times of MSPI ECC read, including ECC byte error and data byte error. It is cleared by when SPI_MEM_ECC_ERR_INT_CLR bit is set."]
10pub type ECC_ERR_CNT_R = crate::FieldReader;
11impl R {
12    #[doc = "Bits 6:12 - It records the first ECC data error bit number when SPI_FMEM_ECC_ERR_INT_EN/SPI_SMEM_ECC_ERR_INT_EN is set and accessed to flash/Ext_RAM. The value ranges from 0~127, corresponding to the bit number in 16 data bytes. It is cleared by SPI_MEM_ECC_ERR_INT_CLR bit."]
13    #[inline(always)]
14    pub fn ecc_data_err_bit(&self) -> ECC_DATA_ERR_BIT_R {
15        ECC_DATA_ERR_BIT_R::new(((self.bits >> 6) & 0x7f) as u8)
16    }
17    #[doc = "Bits 13:15 - When SPI_MEM_ECC_BYTE_ERR is set, these bits show the error bit number of ECC byte."]
18    #[inline(always)]
19    pub fn ecc_chk_err_bit(&self) -> ECC_CHK_ERR_BIT_R {
20        ECC_CHK_ERR_BIT_R::new(((self.bits >> 13) & 7) as u8)
21    }
22    #[doc = "Bit 16 - It records the first ECC byte error when SPI_FMEM_ECC_ERR_INT_EN/SPI_SMEM_ECC_ERR_INT_EN is set and accessed to flash/Ext_RAM. It is cleared by SPI_MEM_ECC_ERR_INT_CLR bit."]
23    #[inline(always)]
24    pub fn ecc_byte_err(&self) -> ECC_BYTE_ERR_R {
25        ECC_BYTE_ERR_R::new(((self.bits >> 16) & 1) != 0)
26    }
27    #[doc = "Bits 17:24 - This bits show the error times of MSPI ECC read, including ECC byte error and data byte error. It is cleared by when SPI_MEM_ECC_ERR_INT_CLR bit is set."]
28    #[inline(always)]
29    pub fn ecc_err_cnt(&self) -> ECC_ERR_CNT_R {
30        ECC_ERR_CNT_R::new(((self.bits >> 17) & 0xff) as u8)
31    }
32}
33#[cfg(feature = "impl-register-debug")]
34impl core::fmt::Debug for R {
35    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
36        f.debug_struct("ECC_ERR_BIT")
37            .field("ecc_data_err_bit", &self.ecc_data_err_bit())
38            .field("ecc_chk_err_bit", &self.ecc_chk_err_bit())
39            .field("ecc_byte_err", &self.ecc_byte_err())
40            .field("ecc_err_cnt", &self.ecc_err_cnt())
41            .finish()
42    }
43}
44#[doc = "MSPI ECC error bits register\n\nYou can [`read`](crate::Reg::read) this register and get [`ecc_err_bit::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
45pub struct ECC_ERR_BIT_SPEC;
46impl crate::RegisterSpec for ECC_ERR_BIT_SPEC {
47    type Ux = u32;
48}
49#[doc = "`read()` method returns [`ecc_err_bit::R`](R) reader structure"]
50impl crate::Readable for ECC_ERR_BIT_SPEC {}
51#[doc = "`reset()` method sets ECC_ERR_BIT to value 0"]
52impl crate::Resettable for ECC_ERR_BIT_SPEC {
53    const RESET_VALUE: u32 = 0;
54}
esp32s3/spi0/ecc_err_bit.rs

esp32s3/spi0/
ecc_err_bit.rs
