pub struct R(_);
Expand description

Register SPI_SMEM_AC reader

Implementations

Bit 0 - Set this bit to keep SPI_CS low when MSPI is in PREP state.

Bit 1 - Set this bit to keep SPI_CS low when MSPI is in DONE state.

Bits 2:6 - (cycles-1) of PREP phase by SPI_CLK, which is the SPI_CS setup time. These bits are combined with SPI_MEM_CS_SETUP bit.

Bits 7:11 - SPI Bus CS (SPI_CS) signal is delayed to inactive by SPI Bus clock (SPI_CLK), which is the SPI_CS hold time in non-ECC mode. These bits are combined with SPI_MEM_CS_HOLD bit.

Bits 12:14 - SPI_SMEM_CS_HOLD_TIME + SPI_SMEM_ECC_CS_HOLD_TIME is the MSPI CS hold cycles in ECC mode when accesses to external RAM.

Bit 15 - 1: MSPI skips page corner when accesses to external RAM. 0: Not skip page corner when accesses to external RAM.

Bit 16 - Set this bit to enable MSPI ECC 16 bytes data with 2 ECC bytes mode when accesses to external RAM.

Bit 24 - Set this bit to calculate the error times of MSPI ECC read when accesses to external RAM.

Bits 25:30 - These bits are used to set the minimum CS high time tSHSL between SPI burst transfer when accesses to external RAM. tSHSL is (SPI_SMEM_CS_HOLD_DELAY[5:0] + 1) MSPI core clock cycles.

Methods from Deref<Target = R<SPI_SMEM_AC_SPEC>>

Reads raw bits from register.

Trait Implementations

The resulting type after dereferencing.

Dereferences the value.

Converts to this type from the input type.

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