Expand description
SPI USER control register
Structs§
- SPI USER control register
Type Aliases§
- Field
CK_OUT_EDGEreader - the bit combined with spi_mosi_delay_mode bits to set mosi signal delay mode. Can be configured in CONF state. - Field
CK_OUT_EDGEwriter - the bit combined with spi_mosi_delay_mode bits to set mosi signal delay mode. Can be configured in CONF state. - Field
CS_HOLDreader - spi cs keep low when spi is in done phase. 1: enable 0: disable. Can be configured in CONF state. - Field
CS_HOLDwriter - spi cs keep low when spi is in done phase. 1: enable 0: disable. Can be configured in CONF state. - Field
CS_SETUPreader - spi cs is enable when spi is in prepare phase. 1: enable 0: disable. Can be configured in CONF state. - Field
CS_SETUPwriter - spi cs is enable when spi is in prepare phase. 1: enable 0: disable. Can be configured in CONF state. - Field
DOUTDINreader - Set the bit to enable full duplex communication. 1: enable 0: disable. Can be configured in CONF state. - Field
DOUTDINwriter - Set the bit to enable full duplex communication. 1: enable 0: disable. Can be configured in CONF state. - Field
FWRITE_DUALreader - In the write operations read-data phase apply 2 signals. Can be configured in CONF state. - Field
FWRITE_DUALwriter - In the write operations read-data phase apply 2 signals. Can be configured in CONF state. - Field
FWRITE_OCTreader - In the write operations read-data phase apply 8 signals. Can be configured in CONF state. - Field
FWRITE_OCTwriter - In the write operations read-data phase apply 8 signals. Can be configured in CONF state. - Field
FWRITE_QUADreader - In the write operations read-data phase apply 4 signals. Can be configured in CONF state. - Field
FWRITE_QUADwriter - In the write operations read-data phase apply 4 signals. Can be configured in CONF state. - Field
OPI_MODEreader - Just for master mode. 1: spi controller is in OPI mode (all in 8-b-m). 0: others. Can be configured in CONF state. - Field
OPI_MODEwriter - Just for master mode. 1: spi controller is in OPI mode (all in 8-b-m). 0: others. Can be configured in CONF state. - Field
QPI_MODEreader - Both for master mode and slave mode. 1: spi controller is in QPI mode. 0: others. Can be configured in CONF state. - Field
QPI_MODEwriter - Both for master mode and slave mode. 1: spi controller is in QPI mode. 0: others. Can be configured in CONF state. - Register
USERreader - Field
RSCK_I_EDGEreader - In the slave mode, this bit can be used to change the polarity of rsck. 0: rsck = !spi_ck_i. 1:rsck = spi_ck_i. - Field
RSCK_I_EDGEwriter - In the slave mode, this bit can be used to change the polarity of rsck. 0: rsck = !spi_ck_i. 1:rsck = spi_ck_i. - Field
SIOreader - Set the bit to enable 3-line half duplex communication mosi and miso signals share the same pin. 1: enable 0: disable. Can be configured in CONF state. - Field
SIOwriter - Set the bit to enable 3-line half duplex communication mosi and miso signals share the same pin. 1: enable 0: disable. Can be configured in CONF state. - Field
TSCK_I_EDGEreader - In the slave mode, this bit can be used to change the polarity of tsck. 0: tsck = spi_ck_i. 1:tsck = !spi_ck_i. - Field
TSCK_I_EDGEwriter - In the slave mode, this bit can be used to change the polarity of tsck. 0: tsck = spi_ck_i. 1:tsck = !spi_ck_i. - Field
USR_ADDRreader - This bit enable the address phase of an operation. Can be configured in CONF state. - Field
USR_ADDRwriter - This bit enable the address phase of an operation. Can be configured in CONF state. - Field
USR_COMMANDreader - This bit enable the command phase of an operation. Can be configured in CONF state. - Field
USR_COMMANDwriter - This bit enable the command phase of an operation. Can be configured in CONF state. - Field
USR_CONF_NXTreader - 1: Enable the DMA CONF phase of next seg-trans operation, which means seg-trans will continue. 0: The seg-trans will end after the current SPI seg-trans or this is not seg-trans mode. Can be configured in CONF state. - Field
USR_CONF_NXTwriter - 1: Enable the DMA CONF phase of next seg-trans operation, which means seg-trans will continue. 0: The seg-trans will end after the current SPI seg-trans or this is not seg-trans mode. Can be configured in CONF state. - Field
USR_DUMMY_IDLEreader - spi clock is disable in dummy phase when the bit is enable. Can be configured in CONF state. - Field
USR_DUMMY_IDLEwriter - spi clock is disable in dummy phase when the bit is enable. Can be configured in CONF state. - Field
USR_DUMMYreader - This bit enable the dummy phase of an operation. Can be configured in CONF state. - Field
USR_DUMMYwriter - This bit enable the dummy phase of an operation. Can be configured in CONF state. - Field
USR_MISO_HIGHPARTreader - read-data phase only access to high-part of the buffer spi_w8~spi_w15. 1: enable 0: disable. Can be configured in CONF state. - Field
USR_MISO_HIGHPARTwriter - read-data phase only access to high-part of the buffer spi_w8~spi_w15. 1: enable 0: disable. Can be configured in CONF state. - Field
USR_MISOreader - This bit enable the read-data phase of an operation. Can be configured in CONF state. - Field
USR_MISOwriter - This bit enable the read-data phase of an operation. Can be configured in CONF state. - Field
USR_MOSI_HIGHPARTreader - write-data phase only access to high-part of the buffer spi_w8~spi_w15. 1: enable 0: disable. Can be configured in CONF state. - Field
USR_MOSI_HIGHPARTwriter - write-data phase only access to high-part of the buffer spi_w8~spi_w15. 1: enable 0: disable. Can be configured in CONF state. - Field
USR_MOSIreader - This bit enable the write-data phase of an operation. Can be configured in CONF state. - Field
USR_MOSIwriter - This bit enable the write-data phase of an operation. Can be configured in CONF state. - Register
USERwriter