Struct esp32s3::sens::RegisterBlock

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#[repr(C)]
pub struct RegisterBlock { /* private fields */ }
Expand description

Register block

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impl RegisterBlock

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pub const fn sar_reader1_ctrl(&self) -> &SAR_READER1_CTRL

0x00 - configure saradc1 reader

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pub const fn sar_reader1_status(&self) -> &SAR_READER1_STATUS

0x04 - get saradc1 reader controller status

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pub const fn sar_meas1_ctrl1(&self) -> &SAR_MEAS1_CTRL1

0x08 - no public

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pub const fn sar_meas1_ctrl2(&self) -> &SAR_MEAS1_CTRL2

0x0c - configure saradc1 controller

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pub const fn sar_meas1_mux(&self) -> &SAR_MEAS1_MUX

0x10 - configure saradc1 controller

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pub const fn sar_atten1(&self) -> &SAR_ATTEN1

0x14 - configure saradc1 controller

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pub const fn sar_amp_ctrl1(&self) -> &SAR_AMP_CTRL1

0x18 - no public

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pub const fn sar_amp_ctrl2(&self) -> &SAR_AMP_CTRL2

0x1c - no public

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pub const fn sar_amp_ctrl3(&self) -> &SAR_AMP_CTRL3

0x20 - no public

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pub const fn sar_reader2_ctrl(&self) -> &SAR_READER2_CTRL

0x24 - configure saradc2 reader

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pub const fn sar_reader2_status(&self) -> &SAR_READER2_STATUS

0x28 - get saradc1 reader controller status

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pub const fn sar_meas2_ctrl1(&self) -> &SAR_MEAS2_CTRL1

0x2c - configure saradc2 controller

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pub const fn sar_meas2_ctrl2(&self) -> &SAR_MEAS2_CTRL2

0x30 - configure saradc2 controller

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pub const fn sar_meas2_mux(&self) -> &SAR_MEAS2_MUX

0x34 - configure saradc2 controller

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pub const fn sar_atten2(&self) -> &SAR_ATTEN2

0x38 - configure saradc2 controller

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pub const fn sar_power_xpd_sar(&self) -> &SAR_POWER_XPD_SAR

0x3c - configure power of saradc

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pub const fn sar_slave_addr1(&self) -> &SAR_SLAVE_ADDR1

0x40 - configure i2c slave address

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pub const fn sar_slave_addr2(&self) -> &SAR_SLAVE_ADDR2

0x44 - configure i2c slave address

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pub const fn sar_slave_addr3(&self) -> &SAR_SLAVE_ADDR3

0x48 - configure i2c slave address

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pub const fn sar_slave_addr4(&self) -> &SAR_SLAVE_ADDR4

0x4c - configure i2c slave address

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pub const fn sar_tsens_ctrl(&self) -> &SAR_TSENS_CTRL

0x50 - configure tsens controller

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pub const fn sar_tsens_ctrl2(&self) -> &SAR_TSENS_CTRL2

0x54 - configure tsens controller

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pub const fn sar_i2c_ctrl(&self) -> &SAR_I2C_CTRL

0x58 - configure rtc i2c controller by sw

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pub const fn sar_touch_conf(&self) -> &SAR_TOUCH_CONF

0x5c - configure touch controller

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pub const fn sar_touch_denoise(&self) -> &SAR_TOUCH_DENOISE

0x60 - configure touch controller

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pub const fn sar_touch_thres1(&self) -> &SAR_TOUCH_THRES1

0x64 - configure touch thres of touch pad

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pub const fn sar_touch_thres2(&self) -> &SAR_TOUCH_THRES2

0x68 - configure touch thres of touch pad

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pub const fn sar_touch_thres3(&self) -> &SAR_TOUCH_THRES3

0x6c - configure touch thres of touch pad

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pub const fn sar_touch_thres4(&self) -> &SAR_TOUCH_THRES4

0x70 - configure touch thres of touch pad

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pub const fn sar_touch_thres5(&self) -> &SAR_TOUCH_THRES5

0x74 - configure touch thres of touch pad

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pub const fn sar_touch_thres6(&self) -> &SAR_TOUCH_THRES6

0x78 - configure touch thres of touch pad

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pub const fn sar_touch_thres7(&self) -> &SAR_TOUCH_THRES7

0x7c - configure touch thres of touch pad

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pub const fn sar_touch_thres8(&self) -> &SAR_TOUCH_THRES8

0x80 - configure touch thres of touch pad

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pub const fn sar_touch_thres9(&self) -> &SAR_TOUCH_THRES9

0x84 - configure touch thres of touch pad

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pub const fn sar_touch_thres10(&self) -> &SAR_TOUCH_THRES10

0x88 - configure touch thres of touch pad

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pub const fn sar_touch_thres11(&self) -> &SAR_TOUCH_THRES11

0x8c - configure touch thres of touch pad

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pub const fn sar_touch_thres12(&self) -> &SAR_TOUCH_THRES12

0x90 - configure touch thres of touch pad

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pub const fn sar_touch_thres13(&self) -> &SAR_TOUCH_THRES13

0x94 - configure touch thres of touch pad

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pub const fn sar_touch_thres14(&self) -> &SAR_TOUCH_THRES14

0x98 - configure touch thres of touch pad

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pub const fn sar_touch_chn_st(&self) -> &SAR_TOUCH_CHN_ST

0x9c - Get touch channel status

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pub const fn sar_touch_status0(&self) -> &SAR_TOUCH_STATUS0

0xa0 - get touch scan status

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pub const fn sar_touch_status1(&self) -> &SAR_TOUCH_STATUS1

0xa4 - touch channel status of touch pad 1

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pub const fn sar_touch_status2(&self) -> &SAR_TOUCH_STATUS2

0xa8 - touch channel status of touch pad 2

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pub const fn sar_touch_status3(&self) -> &SAR_TOUCH_STATUS3

0xac - touch channel status of touch pad 3

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pub const fn sar_touch_status4(&self) -> &SAR_TOUCH_STATUS4

0xb0 - touch channel status of touch pad 4

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pub const fn sar_touch_status5(&self) -> &SAR_TOUCH_STATUS5

0xb4 - touch channel status of touch pad 5

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pub const fn sar_touch_status6(&self) -> &SAR_TOUCH_STATUS6

0xb8 - touch channel status of touch pad 6

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pub const fn sar_touch_status7(&self) -> &SAR_TOUCH_STATUS7

0xbc - touch channel status of touch pad 7

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pub const fn sar_touch_status8(&self) -> &SAR_TOUCH_STATUS8

0xc0 - touch channel status of touch pad 8

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pub const fn sar_touch_status9(&self) -> &SAR_TOUCH_STATUS9

0xc4 - touch channel status of touch pad 9

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pub const fn sar_touch_status10(&self) -> &SAR_TOUCH_STATUS10

0xc8 - touch channel status of touch pad 10

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pub const fn sar_touch_status11(&self) -> &SAR_TOUCH_STATUS11

0xcc - touch channel status of touch pad 11

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pub const fn sar_touch_status12(&self) -> &SAR_TOUCH_STATUS12

0xd0 - touch channel status of touch pad 12

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pub const fn sar_touch_status13(&self) -> &SAR_TOUCH_STATUS13

0xd4 - touch channel status of touch pad 13

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pub const fn sar_touch_status14(&self) -> &SAR_TOUCH_STATUS14

0xd8 - touch channel status of touch pad 14

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pub const fn sar_touch_status15(&self) -> &SAR_TOUCH_STATUS15

0xdc - touch channel status of sleep pad

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pub const fn sar_touch_status16(&self) -> &SAR_TOUCH_STATUS16

0xe0 - touch channel status of approach mode

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pub const fn sar_cocpu_state(&self) -> &SAR_COCPU_STATE

0xe4 - get cocpu status

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pub const fn sar_cocpu_int_raw(&self) -> &SAR_COCPU_INT_RAW

0xe8 - the interrupt raw of ulp

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pub const fn sar_cocpu_int_ena(&self) -> &SAR_COCPU_INT_ENA

0xec - the interrupt enable of ulp

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pub const fn sar_cocpu_int_st(&self) -> &SAR_COCPU_INT_ST

0xf0 - the interrupt state of ulp

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pub const fn sar_cocpu_int_clr(&self) -> &SAR_COCPU_INT_CLR

0xf4 - the interrupt clear of ulp

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pub const fn sar_cocpu_debug(&self) -> &SAR_COCPU_DEBUG

0xf8 - Ulp-riscv debug signal

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pub const fn sar_hall_ctrl(&self) -> &SAR_HALL_CTRL

0xfc - no public

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pub const fn sar_nouse(&self) -> &SAR_NOUSE

0x100 - no public

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pub const fn sar_peri_clk_gate_conf(&self) -> &SAR_PERI_CLK_GATE_CONF

0x104 - the peri clock gate of rtc peri

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pub const fn sar_peri_reset_conf(&self) -> &SAR_PERI_RESET_CONF

0x108 - the peri reset of rtc peri

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pub const fn sar_cocpu_int_ena_w1ts(&self) -> &SAR_COCPU_INT_ENA_W1TS

0x10c - the interrupt enable of ulp

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pub const fn sar_cocpu_int_ena_w1tc(&self) -> &SAR_COCPU_INT_ENA_W1TC

0x110 - the interrupt enable clear of ulp

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pub const fn sar_debug_conf(&self) -> &SAR_DEBUG_CONF

0x114 - rtc peri debug configure

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pub const fn sar_sardate(&self) -> &SAR_SARDATE

0x1fc - version

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