Type Alias esp32s3::system::perip_clk_en0::W
source · pub type W = W<PERIP_CLK_EN0_SPEC>;Expand description
Register PERIP_CLK_EN0 writer
Aliased Type§
struct W { /* private fields */ }Implementations§
source§impl W
impl W
sourcepub fn timers_clk_en(&mut self) -> TIMERS_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn timers_clk_en(&mut self) -> TIMERS_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 0 - Set 1 to enable TIMERS clock
sourcepub fn spi01_clk_en(&mut self) -> SPI01_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn spi01_clk_en(&mut self) -> SPI01_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 1 - Set 1 to enable SPI01 clock
sourcepub fn uart_clk_en(&mut self) -> UART_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn uart_clk_en(&mut self) -> UART_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 2 - Set 1 to enable UART clock
sourcepub fn wdg_clk_en(&mut self) -> WDG_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn wdg_clk_en(&mut self) -> WDG_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 3 - Set 1 to enable WDG clock
sourcepub fn i2s0_clk_en(&mut self) -> I2S0_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn i2s0_clk_en(&mut self) -> I2S0_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 4 - Set 1 to enable I2S0 clock
sourcepub fn uart1_clk_en(&mut self) -> UART1_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn uart1_clk_en(&mut self) -> UART1_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 5 - Set 1 to enable UART1 clock
sourcepub fn spi2_clk_en(&mut self) -> SPI2_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn spi2_clk_en(&mut self) -> SPI2_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 6 - Set 1 to enable SPI2 clock
sourcepub fn i2c_ext0_clk_en(&mut self) -> I2C_EXT0_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn i2c_ext0_clk_en(&mut self) -> I2C_EXT0_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 7 - Set 1 to enable I2C_EXT0 clock
sourcepub fn uhci0_clk_en(&mut self) -> UHCI0_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn uhci0_clk_en(&mut self) -> UHCI0_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 8 - Set 1 to enable UHCI0 clock
sourcepub fn rmt_clk_en(&mut self) -> RMT_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn rmt_clk_en(&mut self) -> RMT_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 9 - Set 1 to enable RMT clock
sourcepub fn pcnt_clk_en(&mut self) -> PCNT_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn pcnt_clk_en(&mut self) -> PCNT_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 10 - Set 1 to enable PCNT clock
sourcepub fn ledc_clk_en(&mut self) -> LEDC_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn ledc_clk_en(&mut self) -> LEDC_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 11 - Set 1 to enable LEDC clock
sourcepub fn uhci1_clk_en(&mut self) -> UHCI1_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn uhci1_clk_en(&mut self) -> UHCI1_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 12 - Set 1 to enable UHCI1 clock
sourcepub fn timergroup_clk_en(
&mut self,
) -> TIMERGROUP_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn timergroup_clk_en( &mut self, ) -> TIMERGROUP_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 13 - Set 1 to enable TIMERGROUP clock
sourcepub fn efuse_clk_en(&mut self) -> EFUSE_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn efuse_clk_en(&mut self) -> EFUSE_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 14 - Set 1 to enable EFUSE clock
sourcepub fn timergroup1_clk_en(
&mut self,
) -> TIMERGROUP1_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn timergroup1_clk_en( &mut self, ) -> TIMERGROUP1_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 15 - Set 1 to enable TIMERGROUP1 clock
sourcepub fn spi3_clk_en(&mut self) -> SPI3_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn spi3_clk_en(&mut self) -> SPI3_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 16 - Set 1 to enable SPI3 clock
sourcepub fn pwm0_clk_en(&mut self) -> PWM0_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn pwm0_clk_en(&mut self) -> PWM0_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 17 - Set 1 to enable PWM0 clock
sourcepub fn i2c_ext1_clk_en(&mut self) -> I2C_EXT1_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn i2c_ext1_clk_en(&mut self) -> I2C_EXT1_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 18 - Set 1 to enable I2C_EXT1 clock
sourcepub fn twai_clk_en(&mut self) -> TWAI_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn twai_clk_en(&mut self) -> TWAI_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 19 - Set 1 to enable CAN clock
sourcepub fn pwm1_clk_en(&mut self) -> PWM1_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn pwm1_clk_en(&mut self) -> PWM1_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 20 - Set 1 to enable PWM1 clock
sourcepub fn i2s1_clk_en(&mut self) -> I2S1_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn i2s1_clk_en(&mut self) -> I2S1_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 21 - Set 1 to enable I2S1 clock
sourcepub fn spi2_dma_clk_en(&mut self) -> SPI2_DMA_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn spi2_dma_clk_en(&mut self) -> SPI2_DMA_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 22 - Set 1 to enable SPI2_DMA clock
sourcepub fn usb_clk_en(&mut self) -> USB_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn usb_clk_en(&mut self) -> USB_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 23 - Set 1 to enable USB clock
sourcepub fn uart_mem_clk_en(&mut self) -> UART_MEM_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn uart_mem_clk_en(&mut self) -> UART_MEM_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 24 - Set 1 to enable UART_MEM clock
sourcepub fn pwm2_clk_en(&mut self) -> PWM2_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn pwm2_clk_en(&mut self) -> PWM2_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 25 - Set 1 to enable PWM2 clock
sourcepub fn pwm3_clk_en(&mut self) -> PWM3_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn pwm3_clk_en(&mut self) -> PWM3_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 26 - Set 1 to enable PWM3 clock
sourcepub fn spi3_dma_clk_en(&mut self) -> SPI3_DMA_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn spi3_dma_clk_en(&mut self) -> SPI3_DMA_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 27 - Set 1 to enable SPI4 clock
sourcepub fn apb_saradc_clk_en(
&mut self,
) -> APB_SARADC_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn apb_saradc_clk_en( &mut self, ) -> APB_SARADC_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 28 - Set 1 to enable APB_SARADC clock
sourcepub fn systimer_clk_en(&mut self) -> SYSTIMER_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn systimer_clk_en(&mut self) -> SYSTIMER_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 29 - Set 1 to enable SYSTEMTIMER clock
sourcepub fn adc2_arb_clk_en(&mut self) -> ADC2_ARB_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn adc2_arb_clk_en(&mut self) -> ADC2_ARB_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 30 - Set 1 to enable ADC2_ARB clock
sourcepub fn spi4_clk_en(&mut self) -> SPI4_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
pub fn spi4_clk_en(&mut self) -> SPI4_CLK_EN_W<'_, PERIP_CLK_EN0_SPEC>
Bit 31 - Set 1 to enable SPI4 clock