1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167

#[doc = "Register `DOEPCTL1` reader"]
pub type R = crate::R<DOEPCTL1_SPEC>;
#[doc = "Register `DOEPCTL1` writer"]
pub type W = crate::W<DOEPCTL1_SPEC>;
#[doc = "Field `MPS1` reader - "]
pub type MPS1_R = crate::FieldReader<u16>;
#[doc = "Field `USBACTEP1` reader - "]
pub type USBACTEP1_R = crate::BitReader;
#[doc = "Field `NAKSTS1` reader - "]
pub type NAKSTS1_R = crate::BitReader;
#[doc = "Field `EPTYPE1` reader - "]
pub type EPTYPE1_R = crate::FieldReader;
#[doc = "Field `SNP1` reader - "]
pub type SNP1_R = crate::BitReader;
#[doc = "Field `SNP1` writer - "]
pub type SNP1_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `STALL1` reader - "]
pub type STALL1_R = crate::BitReader;
#[doc = "Field `STALL1` writer - "]
pub type STALL1_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `CNAK1` writer - "]
pub type CNAK1_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `DO_SNAK1` writer - "]
pub type DO_SNAK1_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `DO_SETD0PID1` writer - "]
pub type DO_SETD0PID1_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `DO_SETD1PID1` writer - "]
pub type DO_SETD1PID1_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `EPDIS1` reader - "]
pub type EPDIS1_R = crate::BitReader;
#[doc = "Field `EPENA1` reader - "]
pub type EPENA1_R = crate::BitReader;
#[doc = "Field `EPENA1` writer - "]
pub type EPENA1_W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
    #[doc = "Bits 0:10"]
    #[inline(always)]
    pub fn mps1(&self) -> MPS1_R {
        MPS1_R::new((self.bits & 0x07ff) as u16)
    }
    #[doc = "Bit 15"]
    #[inline(always)]
    pub fn usbactep1(&self) -> USBACTEP1_R {
        USBACTEP1_R::new(((self.bits >> 15) & 1) != 0)
    }
    #[doc = "Bit 17"]
    #[inline(always)]
    pub fn naksts1(&self) -> NAKSTS1_R {
        NAKSTS1_R::new(((self.bits >> 17) & 1) != 0)
    }
    #[doc = "Bits 18:19"]
    #[inline(always)]
    pub fn eptype1(&self) -> EPTYPE1_R {
        EPTYPE1_R::new(((self.bits >> 18) & 3) as u8)
    }
    #[doc = "Bit 20"]
    #[inline(always)]
    pub fn snp1(&self) -> SNP1_R {
        SNP1_R::new(((self.bits >> 20) & 1) != 0)
    }
    #[doc = "Bit 21"]
    #[inline(always)]
    pub fn stall1(&self) -> STALL1_R {
        STALL1_R::new(((self.bits >> 21) & 1) != 0)
    }
    #[doc = "Bit 30"]
    #[inline(always)]
    pub fn epdis1(&self) -> EPDIS1_R {
        EPDIS1_R::new(((self.bits >> 30) & 1) != 0)
    }
    #[doc = "Bit 31"]
    #[inline(always)]
    pub fn epena1(&self) -> EPENA1_R {
        EPENA1_R::new(((self.bits >> 31) & 1) != 0)
    }
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for R {
    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
        f.debug_struct("DOEPCTL1")
            .field("mps1", &format_args!("{}", self.mps1().bits()))
            .field("usbactep1", &format_args!("{}", self.usbactep1().bit()))
            .field("naksts1", &format_args!("{}", self.naksts1().bit()))
            .field("eptype1", &format_args!("{}", self.eptype1().bits()))
            .field("snp1", &format_args!("{}", self.snp1().bit()))
            .field("stall1", &format_args!("{}", self.stall1().bit()))
            .field("epdis1", &format_args!("{}", self.epdis1().bit()))
            .field("epena1", &format_args!("{}", self.epena1().bit()))
            .finish()
    }
}
#[cfg(feature = "impl-register-debug")]
impl core::fmt::Debug for crate::generic::Reg<DOEPCTL1_SPEC> {
    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
        core::fmt::Debug::fmt(&self.read(), f)
    }
}
impl W {
    #[doc = "Bit 20"]
    #[inline(always)]
    #[must_use]
    pub fn snp1(&mut self) -> SNP1_W<DOEPCTL1_SPEC> {
        SNP1_W::new(self, 20)
    }
    #[doc = "Bit 21"]
    #[inline(always)]
    #[must_use]
    pub fn stall1(&mut self) -> STALL1_W<DOEPCTL1_SPEC> {
        STALL1_W::new(self, 21)
    }
    #[doc = "Bit 26"]
    #[inline(always)]
    #[must_use]
    pub fn cnak1(&mut self) -> CNAK1_W<DOEPCTL1_SPEC> {
        CNAK1_W::new(self, 26)
    }
    #[doc = "Bit 27"]
    #[inline(always)]
    #[must_use]
    pub fn do_snak1(&mut self) -> DO_SNAK1_W<DOEPCTL1_SPEC> {
        DO_SNAK1_W::new(self, 27)
    }
    #[doc = "Bit 28"]
    #[inline(always)]
    #[must_use]
    pub fn do_setd0pid1(&mut self) -> DO_SETD0PID1_W<DOEPCTL1_SPEC> {
        DO_SETD0PID1_W::new(self, 28)
    }
    #[doc = "Bit 29"]
    #[inline(always)]
    #[must_use]
    pub fn do_setd1pid1(&mut self) -> DO_SETD1PID1_W<DOEPCTL1_SPEC> {
        DO_SETD1PID1_W::new(self, 29)
    }
    #[doc = "Bit 31"]
    #[inline(always)]
    #[must_use]
    pub fn epena1(&mut self) -> EPENA1_W<DOEPCTL1_SPEC> {
        EPENA1_W::new(self, 31)
    }
    #[doc = r" Writes raw bits to the register."]
    #[doc = r""]
    #[doc = r" # Safety"]
    #[doc = r""]
    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
    #[inline(always)]
    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
        self.bits = bits;
        self
    }
}
#[doc = "\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`doepctl1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`doepctl1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
pub struct DOEPCTL1_SPEC;
impl crate::RegisterSpec for DOEPCTL1_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [`doepctl1::R`](R) reader structure"]
impl crate::Readable for DOEPCTL1_SPEC {}
#[doc = "`write(|w| ..)` method takes [`doepctl1::W`](W) writer structure"]
impl crate::Writable for DOEPCTL1_SPEC {
    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
}
#[doc = "`reset()` method sets DOEPCTL1 to value 0x8000"]
impl crate::Resettable for DOEPCTL1_SPEC {
    const RESET_VALUE: u32 = 0x8000;
}