Module esp32s3::spi1::cache_fctrl

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Expand description

SPI1 bit mode control register.

Structs§

Type Aliases§

  • Field CACHE_USR_CMD_4BYTE reader - Set this bit to enable SPI1 transfer with 32 bits address. The value of SPI_MEM_USR_ADDR_BITLEN should be 31.
  • Field CACHE_USR_CMD_4BYTE writer - Set this bit to enable SPI1 transfer with 32 bits address. The value of SPI_MEM_USR_ADDR_BITLEN should be 31.
  • Field FADDR_DUAL reader - When SPI1 accesses to flash or Ext_RAM, set this bit to enable 2-bm in ADDR phase.
  • Field FADDR_DUAL writer - When SPI1 accesses to flash or Ext_RAM, set this bit to enable 2-bm in ADDR phase.
  • Field FADDR_QUAD reader - When SPI1 accesses to flash or Ext_RAM, set this bit to enable 4-bm in ADDR phase.
  • Field FADDR_QUAD writer - When SPI1 accesses to flash or Ext_RAM, set this bit to enable 4-bm in ADDR phase.
  • Field FDIN_DUAL reader - When SPI1 accesses to flash or Ext_RAM, set this bit to enable 2-bm in DIN phase.
  • Field FDIN_DUAL writer - When SPI1 accesses to flash or Ext_RAM, set this bit to enable 2-bm in DIN phase.
  • Field FDIN_QUAD reader - When SPI1 accesses to flash or Ext_RAM, set this bit to enable 4-bm in DIN phase.
  • Field FDIN_QUAD writer - When SPI1 accesses to flash or Ext_RAM, set this bit to enable 4-bm in DIN phase.
  • Field FDOUT_DUAL reader - When SPI1 accesses to flash or Ext_RAM, set this bit to enable 2-bm in DOUT phase.
  • Field FDOUT_DUAL writer - When SPI1 accesses to flash or Ext_RAM, set this bit to enable 2-bm in DOUT phase.
  • Field FDOUT_QUAD reader - When SPI1 accesses to flash or Ext_RAM, set this bit to enable 4-bm in DOUT phase.
  • Field FDOUT_QUAD writer - When SPI1 accesses to flash or Ext_RAM, set this bit to enable 4-bm in DOUT phase.
  • Register CACHE_FCTRL reader
  • Register CACHE_FCTRL writer