Type Alias esp32s3::assist_debug::core_1_intr_ena::R

pub type R = R<CORE_1_INTR_ENA_SPEC>;

Register CORE_1_INTR_ENA reader

Aliased Type

struct R { /* private fields */ }

Implementations

impl R

pub fn core_1_area_dram0_0_rd_intr_ena( &self ) -> CORE_1_AREA_DRAM0_0_RD_INTR_ENA_R

Bit 0 - Core1 dram0 area0 read monitor interrupt enable

pub fn core_1_area_dram0_0_wr_intr_ena( &self ) -> CORE_1_AREA_DRAM0_0_WR_INTR_ENA_R

Bit 1 - Core1 dram0 area0 write monitor interrupt enable

pub fn core_1_area_dram0_1_rd_intr_ena( &self ) -> CORE_1_AREA_DRAM0_1_RD_INTR_ENA_R

Bit 2 - Core1 dram0 area1 read monitor interrupt enable

pub fn core_1_area_dram0_1_wr_intr_ena( &self ) -> CORE_1_AREA_DRAM0_1_WR_INTR_ENA_R

Bit 3 - Core1 dram0 area1 write monitor interrupt enable

pub fn core_1_area_pif_0_rd_intr_ena(&self) -> CORE_1_AREA_PIF_0_RD_INTR_ENA_R

Bit 4 - Core1 PIF area0 read monitor interrupt enable

pub fn core_1_area_pif_0_wr_intr_ena(&self) -> CORE_1_AREA_PIF_0_WR_INTR_ENA_R

Bit 5 - Core1 PIF area0 write monitor interrupt enable

pub fn core_1_area_pif_1_rd_intr_ena(&self) -> CORE_1_AREA_PIF_1_RD_INTR_ENA_R

Bit 6 - Core1 PIF area1 read monitor interrupt enable

pub fn core_1_area_pif_1_wr_intr_ena(&self) -> CORE_1_AREA_PIF_1_WR_INTR_ENA_R

Bit 7 - Core1 PIF area1 write monitor interrupt enable

pub fn core_1_sp_spill_min_intr_ena(&self) -> CORE_1_SP_SPILL_MIN_INTR_ENA_R

Bit 8 - Core1 stackpoint overflow monitor interrupt enable

pub fn core_1_sp_spill_max_intr_ena(&self) -> CORE_1_SP_SPILL_MAX_INTR_ENA_R

Bit 9 - Core1 stackpoint underflow monitor interrupt enable

pub fn core_1_iram0_exception_monitor_intr_ena( &self ) -> CORE_1_IRAM0_EXCEPTION_MONITOR_INTR_ENA_R

Bit 10 - IBUS busy monitor interrupt enable

pub fn core_1_dram0_exception_monitor_intr_ena( &self ) -> CORE_1_DRAM0_EXCEPTION_MONITOR_INTR_ENA_R

Bit 11 - DBUS busy monitor interrupt enbale