Type Alias esp32s3::uhci0::int_ena::R

pub type R = R<INT_ENA_SPEC>;

Register INT_ENA reader

Aliased Type

struct R { /* private fields */ }

Implementations

impl R

pub fn rx_start_int_ena(&self) -> RX_START_INT_ENA_R

Bit 0 - This is the interrupt enable bit for UHCI_RX_START_INT interrupt.

pub fn tx_start_int_ena(&self) -> TX_START_INT_ENA_R

Bit 1 - This is the interrupt enable bit for UHCI_TX_START_INT interrupt.

pub fn rx_hung_int_ena(&self) -> RX_HUNG_INT_ENA_R

Bit 2 - This is the interrupt enable bit for UHCI_RX_HUNG_INT interrupt.

pub fn tx_hung_int_ena(&self) -> TX_HUNG_INT_ENA_R

Bit 3 - This is the interrupt enable bit for UHCI_TX_HUNG_INT interrupt.

pub fn send_s_reg_q_int_ena(&self) -> SEND_S_REG_Q_INT_ENA_R

Bit 4 - This is the interrupt enable bit for UHCI_SEND_S_REQ_Q_INT interrupt.

pub fn send_a_reg_q_int_ena(&self) -> SEND_A_REG_Q_INT_ENA_R

Bit 5 - This is the interrupt enable bit for UHCI_SEND_A_REQ_Q_INT interrupt.

pub fn outlink_eof_err_int_ena(&self) -> OUTLINK_EOF_ERR_INT_ENA_R

Bit 6 - This is the interrupt enable bit for UHCI_OUTLINK_EOF_ERR_INT interrupt.

pub fn app_ctrl0_int_ena(&self) -> APP_CTRL0_INT_ENA_R

Bit 7 - This is the interrupt enable bit for UHCI_APP_CTRL0_INT interrupt.

pub fn app_ctrl1_int_ena(&self) -> APP_CTRL1_INT_ENA_R

Bit 8 - This is the interrupt enable bit for UHCI_APP_CTRL1_INT interrupt.