Type Alias esp32s3::spi0::ctrl1::R

pub type R = R<CTRL1_SPEC>;

Register CTRL1 reader

Aliased Type

struct R { /* private fields */ }

Implementations

impl R

pub fn clk_mode(&self) -> CLK_MODE_R

Bits 0:1 - SPI Bus clock (SPI_CLK) mode bits. 0: SPI Bus clock (SPI_CLK) is off when CS inactive 1: SPI_CLK is delayed one cycle after SPI_CS inactive 2: SPI_CLK is delayed two cycles after SPI_CS inactive 3: SPI_CLK is always on.

pub fn rxfifo_rst(&self) -> RXFIFO_RST_R

Bit 30 - SPI0 RX FIFO reset signal. Set this bit and clear it before SPI0 transfer starts.