Module esp32s3::sensitive::core_1_pif_pms_constrain_14
source · Expand description
core1 access peripherals permission configuration register 14.
Structs
- core1 access peripherals permission configuration register 14.
Type Aliases
- Field
CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_Hreader - RTCSlow_1 memory high region permission in world 0 for core1. - Field
CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_Hwriter - RTCSlow_1 memory high region permission in world 0 for core1. - Field
CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_Lreader - RTCSlow_1 memory low region permission in world 0 for core1. - Field
CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_Lwriter - RTCSlow_1 memory low region permission in world 0 for core1. - Field
CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_Hreader - RTCSlow_1 memory high region permission in world 1 for core1. - Field
CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_Hwriter - RTCSlow_1 memory high region permission in world 1 for core1. - Field
CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_Lreader - RTCSlow_1 memory low region permission in world 1 for core1. - Field
CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_Lwriter - RTCSlow_1 memory low region permission in world 1 for core1. - Register
CORE_1_PIF_PMS_CONSTRAIN_14reader - Register
CORE_1_PIF_PMS_CONSTRAIN_14writer