Module esp32s3::sensitive::core_1_pif_pms_constrain_14

core1 access peripherals permission configuration register 14.

Structs

• CORE_1_PIF_PMS_CONSTRAIN_14_SPEC
  core1 access peripherals permission configuration register 14.

Type Aliases

• CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H_R
  Field CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H reader - RTCSlow_1 memory high region permission in world 0 for core1.
• CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H_W
  Field CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_H writer - RTCSlow_1 memory high region permission in world 0 for core1.
• CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L_R
  Field CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L reader - RTCSlow_1 memory low region permission in world 0 for core1.
• CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L_W
  Field CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_0_L writer - RTCSlow_1 memory low region permission in world 0 for core1.
• CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H_R
  Field CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H reader - RTCSlow_1 memory high region permission in world 1 for core1.
• CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H_W
  Field CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_H writer - RTCSlow_1 memory high region permission in world 1 for core1.
• CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L_R
  Field CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L reader - RTCSlow_1 memory low region permission in world 1 for core1.
• CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L_W
  Field CORE_1_PIF_PMS_CONSTRAIN_RTCSLOW_1_WORLD_1_L writer - RTCSlow_1 memory low region permission in world 1 for core1.
• R
  Register CORE_1_PIF_PMS_CONSTRAIN_14 reader
• W
  Register CORE_1_PIF_PMS_CONSTRAIN_14 writer