Expand description
DMA (Direct Memory Access) Controller
Modules
- reserved
- Version control register
- Reject address accessing external RAM
- Interrupt clear bits of external RAM permission
- Interrupt enable bits of external RAM permission
- Raw interrupt status of external RAM permission
- Masked interrupt status of external RAM permission
- Reject status accessing external RAM
- Configure 0 register of Rx channel 0
- Configure 1 register of Rx channel 0
- The last inlink descriptor address of Rx channel 0
- The second-to-last inlink descriptor address of Rx channel 0
- Current inlink descriptor address of Rx channel 0
- Inlink descriptor address when errors occur of Rx channel 0
- Interrupt clear bits of Rx channel 0
- Interrupt enable bits of Rx channel 0
- Raw status interrupt of Rx channel 0
- Masked interrupt of Rx channel 0
- Link descriptor configure and control register of Rx channel 0
- Peripheral selection of Rx channel 0
- Pop control register of Rx channel 0
- Priority register of Rx channel 0
- Receive L2 FIFO depth of Rx channel 0
- Receive status of Rx channel 0
- Inlink descriptor address when EOF occurs of Rx channel 0
- Weight register of Rx channel 0
- Receive FIFO status of Rx channel 0
- MISC register
- Configure 0 register of Tx channel 0
- Configure 1 register of Tx channel 0
- The last inlink descriptor address of Tx channel 0
- The second-to-last inlink descriptor address of Tx channel 0
- Current inlink descriptor address of Tx channel 0
- The last outlink descriptor address when EOF occurs of Tx channel 0
- Outlink descriptor address when EOF occurs of Tx channel 0
- Interrupt clear bits of Tx channel 0
- Interrupt enable bits of Tx channel 0
- Raw status interrupt of Tx channel 0
- Masked interrupt of Tx channel 0
- Link descriptor configure and control register of Tx channel 0
- Peripheral selection of Tx channel 0
- Priority register of Tx channel 0.
- Push control register of Rx channel 0
- Transmit L2 FIFO depth of Tx channel 0
- Transmit status of Tx channel 0
- Weight register of Rx channel 0
- Transmit FIFO status of Tx channel 0
- reserved
Structs
- Register block
Type Definitions
- AHB_TEST (rw) register accessor: an alias for
Reg<AHB_TEST_SPEC> - DATE (rw) register accessor: an alias for
Reg<DATE_SPEC> - EXTMEM_REJECT_ADDR (r) register accessor: an alias for
Reg<EXTMEM_REJECT_ADDR_SPEC> - EXTMEM_REJECT_INT_CLR (w) register accessor: an alias for
Reg<EXTMEM_REJECT_INT_CLR_SPEC> - EXTMEM_REJECT_INT_ENA (rw) register accessor: an alias for
Reg<EXTMEM_REJECT_INT_ENA_SPEC> - EXTMEM_REJECT_INT_RAW (rw) register accessor: an alias for
Reg<EXTMEM_REJECT_INT_RAW_SPEC> - EXTMEM_REJECT_INT_ST (r) register accessor: an alias for
Reg<EXTMEM_REJECT_INT_ST_SPEC> - EXTMEM_REJECT_ST (r) register accessor: an alias for
Reg<EXTMEM_REJECT_ST_SPEC> - INFIFO_STATUS_CH (r) register accessor: an alias for
Reg<INFIFO_STATUS_CH_SPEC> - IN_CONF0_CH (rw) register accessor: an alias for
Reg<IN_CONF0_CH_SPEC> - IN_CONF1_CH (rw) register accessor: an alias for
Reg<IN_CONF1_CH_SPEC> - IN_DSCR_BF0_CH (r) register accessor: an alias for
Reg<IN_DSCR_BF0_CH_SPEC> - IN_DSCR_BF1_CH (r) register accessor: an alias for
Reg<IN_DSCR_BF1_CH_SPEC> - IN_DSCR_CH (r) register accessor: an alias for
Reg<IN_DSCR_CH_SPEC> - IN_ERR_EOF_DES_ADDR_CH (r) register accessor: an alias for
Reg<IN_ERR_EOF_DES_ADDR_CH_SPEC> - IN_INT_CLR_CH (w) register accessor: an alias for
Reg<IN_INT_CLR_CH_SPEC> - IN_INT_ENA_CH (rw) register accessor: an alias for
Reg<IN_INT_ENA_CH_SPEC> - IN_INT_RAW_CH (rw) register accessor: an alias for
Reg<IN_INT_RAW_CH_SPEC> - IN_INT_ST_CH (r) register accessor: an alias for
Reg<IN_INT_ST_CH_SPEC> - IN_LINK_CH (rw) register accessor: an alias for
Reg<IN_LINK_CH_SPEC> - IN_PERI_SEL_CH (rw) register accessor: an alias for
Reg<IN_PERI_SEL_CH_SPEC> - IN_POP_CH (rw) register accessor: an alias for
Reg<IN_POP_CH_SPEC> - IN_PRI_CH (rw) register accessor: an alias for
Reg<IN_PRI_CH_SPEC> - IN_SRAM_SIZE_CH (rw) register accessor: an alias for
Reg<IN_SRAM_SIZE_CH_SPEC> - IN_STATE_CH (r) register accessor: an alias for
Reg<IN_STATE_CH_SPEC> - IN_SUC_EOF_DES_ADDR_CH (r) register accessor: an alias for
Reg<IN_SUC_EOF_DES_ADDR_CH_SPEC> - IN_WIGHT_CH (rw) register accessor: an alias for
Reg<IN_WIGHT_CH_SPEC> - MISC_CONF (rw) register accessor: an alias for
Reg<MISC_CONF_SPEC> - OUTFIFO_STATUS_CH (r) register accessor: an alias for
Reg<OUTFIFO_STATUS_CH_SPEC> - OUT_CONF0_CH (rw) register accessor: an alias for
Reg<OUT_CONF0_CH_SPEC> - OUT_CONF1_CH (rw) register accessor: an alias for
Reg<OUT_CONF1_CH_SPEC> - OUT_DSCR_BF0_CH (r) register accessor: an alias for
Reg<OUT_DSCR_BF0_CH_SPEC> - OUT_DSCR_BF1_CH (r) register accessor: an alias for
Reg<OUT_DSCR_BF1_CH_SPEC> - OUT_DSCR_CH (r) register accessor: an alias for
Reg<OUT_DSCR_CH_SPEC> - OUT_EOF_BFR_DES_ADDR_CH (r) register accessor: an alias for
Reg<OUT_EOF_BFR_DES_ADDR_CH_SPEC> - OUT_EOF_DES_ADDR_CH (r) register accessor: an alias for
Reg<OUT_EOF_DES_ADDR_CH_SPEC> - OUT_INT_CLR_CH (w) register accessor: an alias for
Reg<OUT_INT_CLR_CH_SPEC> - OUT_INT_ENA_CH (rw) register accessor: an alias for
Reg<OUT_INT_ENA_CH_SPEC> - OUT_INT_RAW_CH (rw) register accessor: an alias for
Reg<OUT_INT_RAW_CH_SPEC> - OUT_INT_ST_CH (r) register accessor: an alias for
Reg<OUT_INT_ST_CH_SPEC> - OUT_LINK_CH (rw) register accessor: an alias for
Reg<OUT_LINK_CH_SPEC> - OUT_PERI_SEL_CH (rw) register accessor: an alias for
Reg<OUT_PERI_SEL_CH_SPEC> - OUT_PRI_CH (rw) register accessor: an alias for
Reg<OUT_PRI_CH_SPEC> - OUT_PUSH_CH (rw) register accessor: an alias for
Reg<OUT_PUSH_CH_SPEC> - OUT_SRAM_SIZE_CH (rw) register accessor: an alias for
Reg<OUT_SRAM_SIZE_CH_SPEC> - OUT_STATE_CH (r) register accessor: an alias for
Reg<OUT_STATE_CH_SPEC> - OUT_WIGHT_CH (rw) register accessor: an alias for
Reg<OUT_WIGHT_CH_SPEC> - PD_CONF (rw) register accessor: an alias for
Reg<PD_CONF_SPEC>