Module esp32s3::spi0::spi_smem_timing_cali
source · [−]Expand description
SPI0 Ext_RAM timing compensation register.
Structs
Register SPI_SMEM_TIMING_CALI reader
Field SPI_SMEM_EXTRA_DUMMY_CYCLELEN reader - Extra SPI_CLK cycles added in DUMMY phase for timing compensation, when SPI0 accesses to Ext_RAM. Active when SPI_SMEM_TIMING_CALI bit is set.
Field SPI_SMEM_EXTRA_DUMMY_CYCLELEN writer - Extra SPI_CLK cycles added in DUMMY phase for timing compensation, when SPI0 accesses to Ext_RAM. Active when SPI_SMEM_TIMING_CALI bit is set.
Field SPI_SMEM_TIMING_CALI reader - Set this bit to add extra SPI_CLK cycles in DUMMY phase for all reading operations.
SPI0 Ext_RAM timing compensation register.
Field SPI_SMEM_TIMING_CALI writer - Set this bit to add extra SPI_CLK cycles in DUMMY phase for all reading operations.
Field SPI_SMEM_TIMING_CLK_ENA reader - Set this bit to power on HCLK. When PLL is powered on, the frequency of HCLK equals to that of PLL. Otherwise, the frequency equals to that of XTAL.
Field SPI_SMEM_TIMING_CLK_ENA writer - Set this bit to power on HCLK. When PLL is powered on, the frequency of HCLK equals to that of PLL. Otherwise, the frequency equals to that of XTAL.
Register SPI_SMEM_TIMING_CALI writer