Struct esp32s3::spi1::RegisterBlock
source · [−]#[repr(C)]pub struct RegisterBlock {Show 45 fields
pub cmd: Reg<CMD_SPEC>,
pub addr: Reg<ADDR_SPEC>,
pub ctrl: Reg<CTRL_SPEC>,
pub ctrl1: Reg<CTRL1_SPEC>,
pub ctrl2: Reg<CTRL2_SPEC>,
pub clock: Reg<CLOCK_SPEC>,
pub user: Reg<USER_SPEC>,
pub user1: Reg<USER1_SPEC>,
pub user2: Reg<USER2_SPEC>,
pub mosi_dlen: Reg<MOSI_DLEN_SPEC>,
pub miso_dlen: Reg<MISO_DLEN_SPEC>,
pub rd_status: Reg<RD_STATUS_SPEC>,
pub ext_addr: Reg<EXT_ADDR_SPEC>,
pub misc: Reg<MISC_SPEC>,
pub tx_crc: Reg<TX_CRC_SPEC>,
pub cache_fctrl: Reg<CACHE_FCTRL_SPEC>,
pub fsm: Reg<FSM_SPEC>,
pub w0: Reg<W0_SPEC>,
pub w1: Reg<W1_SPEC>,
pub w2: Reg<W2_SPEC>,
pub w3: Reg<W3_SPEC>,
pub w4: Reg<W4_SPEC>,
pub w5: Reg<W5_SPEC>,
pub w6: Reg<W6_SPEC>,
pub w7: Reg<W7_SPEC>,
pub w8: Reg<W8_SPEC>,
pub w9: Reg<W9_SPEC>,
pub w10: Reg<W10_SPEC>,
pub w11: Reg<W11_SPEC>,
pub w12: Reg<W12_SPEC>,
pub w13: Reg<W13_SPEC>,
pub w14: Reg<W14_SPEC>,
pub w15: Reg<W15_SPEC>,
pub flash_waiti_ctrl: Reg<FLASH_WAITI_CTRL_SPEC>,
pub flash_sus_cmd: Reg<FLASH_SUS_CMD_SPEC>,
pub flash_sus_ctrl: Reg<FLASH_SUS_CTRL_SPEC>,
pub sus_status: Reg<SUS_STATUS_SPEC>,
pub timing_cali: Reg<TIMING_CALI_SPEC>,
pub ddr: Reg<DDR_SPEC>,
pub clock_gate: Reg<CLOCK_GATE_SPEC>,
pub int_ena: Reg<INT_ENA_SPEC>,
pub int_clr: Reg<INT_CLR_SPEC>,
pub int_raw: Reg<INT_RAW_SPEC>,
pub int_st: Reg<INT_ST_SPEC>,
pub date: Reg<DATE_SPEC>,
/* private fields */
}Expand description
Register block
Fields
cmd: Reg<CMD_SPEC>0x00 - SPI1 memory command register
addr: Reg<ADDR_SPEC>0x04 - SPI1 address register
ctrl: Reg<CTRL_SPEC>0x08 - SPI1 control register
ctrl1: Reg<CTRL1_SPEC>0x0c - SPI1 control1 register
ctrl2: Reg<CTRL2_SPEC>0x10 - SPI1 control2 register
clock: Reg<CLOCK_SPEC>0x14 - SPI_CLK clock division register when SPI1 accesses to flash or Ext_RAM.
user: Reg<USER_SPEC>0x18 - SPI1 user register.
user1: Reg<USER1_SPEC>0x1c - SPI1 user1 register.
user2: Reg<USER2_SPEC>0x20 - SPI1 user2 register.
mosi_dlen: Reg<MOSI_DLEN_SPEC>0x24 - SPI1 write-data bit length register.
miso_dlen: Reg<MISO_DLEN_SPEC>0x28 - SPI1 read-data bit length register.
rd_status: Reg<RD_STATUS_SPEC>0x2c - SPI1 read control register.
ext_addr: Reg<EXT_ADDR_SPEC>0x30 - SPI1 extended address register.
misc: Reg<MISC_SPEC>0x34 - SPI1 misc register.
tx_crc: Reg<TX_CRC_SPEC>0x38 - SPI1 CRC data register.
cache_fctrl: Reg<CACHE_FCTRL_SPEC>0x3c - SPI1 bit mode control register.
fsm: Reg<FSM_SPEC>0x54 - SPI1 state machine(FSM) status register.
w0: Reg<W0_SPEC>0x58 - SPI1 memory data buffer0
w1: Reg<W1_SPEC>0x5c - SPI1 memory data buffer1
w2: Reg<W2_SPEC>0x60 - SPI1 memory data buffer2
w3: Reg<W3_SPEC>0x64 - SPI1 memory data buffer3
w4: Reg<W4_SPEC>0x68 - SPI1 memory data buffer4
w5: Reg<W5_SPEC>0x6c - SPI1 memory data buffer5
w6: Reg<W6_SPEC>0x70 - SPI1 memory data buffer6
w7: Reg<W7_SPEC>0x74 - SPI1 memory data buffer7
w8: Reg<W8_SPEC>0x78 - SPI1 memory data buffer8
w9: Reg<W9_SPEC>0x7c - SPI1 memory data buffer9
w10: Reg<W10_SPEC>0x80 - SPI1 memory data buffer10
w11: Reg<W11_SPEC>0x84 - SPI1 memory data buffer11
w12: Reg<W12_SPEC>0x88 - SPI1 memory data buffer12
w13: Reg<W13_SPEC>0x8c - SPI1 memory data buffer13
w14: Reg<W14_SPEC>0x90 - SPI1 memory data buffer14
w15: Reg<W15_SPEC>0x94 - SPI1 memory data buffer15
flash_waiti_ctrl: Reg<FLASH_WAITI_CTRL_SPEC>0x98 - SPI1 wait idle control register
flash_sus_cmd: Reg<FLASH_SUS_CMD_SPEC>0x9c - SPI1 flash suspend control register
flash_sus_ctrl: Reg<FLASH_SUS_CTRL_SPEC>0xa0 - SPI1 flash suspend command register
sus_status: Reg<SUS_STATUS_SPEC>0xa4 - SPI1 flash suspend status register
timing_cali: Reg<TIMING_CALI_SPEC>0xa8 - SPI1 timing compensation register when accesses to flash or Ext_RAM.
ddr: Reg<DDR_SPEC>0xe0 - SPI1 DDR control register
clock_gate: Reg<CLOCK_GATE_SPEC>0xe8 - SPI1 clk_gate register
int_ena: Reg<INT_ENA_SPEC>0xf0 - SPI1 interrupt enable register
int_clr: Reg<INT_CLR_SPEC>0xf4 - SPI1 interrupt clear register
int_raw: Reg<INT_RAW_SPEC>0xf8 - SPI1 interrupt raw register
int_st: Reg<INT_ST_SPEC>0xfc - SPI1 interrupt status register
date: Reg<DATE_SPEC>0x3fc - SPI0 version control register
Auto Trait Implementations
impl !RefUnwindSafe for RegisterBlock
impl Send for RegisterBlock
impl !Sync for RegisterBlock
impl Unpin for RegisterBlock
impl UnwindSafe for RegisterBlock
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more