pub struct W(_);
Expand description
Register INT_CLR
writer
Implementations
sourceimpl W
impl W
sourcepub fn timer0_stop_int_clr(&mut self) -> TIMER0_STOP_INT_CLR_W<'_>
pub fn timer0_stop_int_clr(&mut self) -> TIMER0_STOP_INT_CLR_W<'_>
Bit 0 - Set this bit to clear the interrupt triggered when the timer 0 stops.
sourcepub fn timer1_stop_int_clr(&mut self) -> TIMER1_STOP_INT_CLR_W<'_>
pub fn timer1_stop_int_clr(&mut self) -> TIMER1_STOP_INT_CLR_W<'_>
Bit 1 - Set this bit to clear the interrupt triggered when the timer 1 stops.
sourcepub fn timer2_stop_int_clr(&mut self) -> TIMER2_STOP_INT_CLR_W<'_>
pub fn timer2_stop_int_clr(&mut self) -> TIMER2_STOP_INT_CLR_W<'_>
Bit 2 - Set this bit to clear the interrupt triggered when the timer 2 stops.
sourcepub fn timer0_tez_int_clr(&mut self) -> TIMER0_TEZ_INT_CLR_W<'_>
pub fn timer0_tez_int_clr(&mut self) -> TIMER0_TEZ_INT_CLR_W<'_>
Bit 3 - Set this bit to clear the interrupt triggered by a PWM timer 0 TEZ event.
sourcepub fn timer1_tez_int_clr(&mut self) -> TIMER1_TEZ_INT_CLR_W<'_>
pub fn timer1_tez_int_clr(&mut self) -> TIMER1_TEZ_INT_CLR_W<'_>
Bit 4 - Set this bit to clear the interrupt triggered by a PWM timer 1 TEZ event.
sourcepub fn timer2_tez_int_clr(&mut self) -> TIMER2_TEZ_INT_CLR_W<'_>
pub fn timer2_tez_int_clr(&mut self) -> TIMER2_TEZ_INT_CLR_W<'_>
Bit 5 - Set this bit to clear the interrupt triggered by a PWM timer 2 TEZ event.
sourcepub fn timer0_tep_int_clr(&mut self) -> TIMER0_TEP_INT_CLR_W<'_>
pub fn timer0_tep_int_clr(&mut self) -> TIMER0_TEP_INT_CLR_W<'_>
Bit 6 - Set this bit to clear the interrupt triggered by a PWM timer 0 TEP event.
sourcepub fn timer1_tep_int_clr(&mut self) -> TIMER1_TEP_INT_CLR_W<'_>
pub fn timer1_tep_int_clr(&mut self) -> TIMER1_TEP_INT_CLR_W<'_>
Bit 7 - Set this bit to clear the interrupt triggered by a PWM timer 1 TEP event.
sourcepub fn timer2_tep_int_clr(&mut self) -> TIMER2_TEP_INT_CLR_W<'_>
pub fn timer2_tep_int_clr(&mut self) -> TIMER2_TEP_INT_CLR_W<'_>
Bit 8 - Set this bit to clear the interrupt triggered by a PWM timer 2 TEP event.
sourcepub fn fault0_int_clr(&mut self) -> FAULT0_INT_CLR_W<'_>
pub fn fault0_int_clr(&mut self) -> FAULT0_INT_CLR_W<'_>
Bit 9 - Set this bit to clear the interrupt triggered when event_f0 starts.
sourcepub fn fault1_int_clr(&mut self) -> FAULT1_INT_CLR_W<'_>
pub fn fault1_int_clr(&mut self) -> FAULT1_INT_CLR_W<'_>
Bit 10 - Set this bit to clear the interrupt triggered when event_f1 starts.
sourcepub fn fault2_int_clr(&mut self) -> FAULT2_INT_CLR_W<'_>
pub fn fault2_int_clr(&mut self) -> FAULT2_INT_CLR_W<'_>
Bit 11 - Set this bit to clear the interrupt triggered when event_f2 starts.
sourcepub fn fault0_clr_int_clr(&mut self) -> FAULT0_CLR_INT_CLR_W<'_>
pub fn fault0_clr_int_clr(&mut self) -> FAULT0_CLR_INT_CLR_W<'_>
Bit 12 - Set this bit to clear the interrupt triggered when event_f0 ends.
sourcepub fn fault1_clr_int_clr(&mut self) -> FAULT1_CLR_INT_CLR_W<'_>
pub fn fault1_clr_int_clr(&mut self) -> FAULT1_CLR_INT_CLR_W<'_>
Bit 13 - Set this bit to clear the interrupt triggered when event_f1 ends.
sourcepub fn fault2_clr_int_clr(&mut self) -> FAULT2_CLR_INT_CLR_W<'_>
pub fn fault2_clr_int_clr(&mut self) -> FAULT2_CLR_INT_CLR_W<'_>
Bit 14 - Set this bit to clear the interrupt triggered when event_f2 ends.
sourcepub fn cmpr0_tea_int_clr(&mut self) -> CMPR0_TEA_INT_CLR_W<'_>
pub fn cmpr0_tea_int_clr(&mut self) -> CMPR0_TEA_INT_CLR_W<'_>
Bit 15 - Set this bit to clear the interrupt triggered by a PWM operator 0 TEA event
sourcepub fn cmpr1_tea_int_clr(&mut self) -> CMPR1_TEA_INT_CLR_W<'_>
pub fn cmpr1_tea_int_clr(&mut self) -> CMPR1_TEA_INT_CLR_W<'_>
Bit 16 - Set this bit to clear the interrupt triggered by a PWM operator 1 TEA event
sourcepub fn cmpr2_tea_int_clr(&mut self) -> CMPR2_TEA_INT_CLR_W<'_>
pub fn cmpr2_tea_int_clr(&mut self) -> CMPR2_TEA_INT_CLR_W<'_>
Bit 17 - Set this bit to clear the interrupt triggered by a PWM operator 2 TEA event
sourcepub fn cmpr0_teb_int_clr(&mut self) -> CMPR0_TEB_INT_CLR_W<'_>
pub fn cmpr0_teb_int_clr(&mut self) -> CMPR0_TEB_INT_CLR_W<'_>
Bit 18 - Set this bit to clear the interrupt triggered by a PWM operator 0 TEB event
sourcepub fn cmpr1_teb_int_clr(&mut self) -> CMPR1_TEB_INT_CLR_W<'_>
pub fn cmpr1_teb_int_clr(&mut self) -> CMPR1_TEB_INT_CLR_W<'_>
Bit 19 - Set this bit to clear the interrupt triggered by a PWM operator 1 TEB event
sourcepub fn cmpr2_teb_int_clr(&mut self) -> CMPR2_TEB_INT_CLR_W<'_>
pub fn cmpr2_teb_int_clr(&mut self) -> CMPR2_TEB_INT_CLR_W<'_>
Bit 20 - Set this bit to clear the interrupt triggered by a PWM operator 2 TEB event
sourcepub fn tz0_cbc_int_clr(&mut self) -> TZ0_CBC_INT_CLR_W<'_>
pub fn tz0_cbc_int_clr(&mut self) -> TZ0_CBC_INT_CLR_W<'_>
Bit 21 - Set this bit to clear the interrupt triggered by a cycle-by-cycle mode action on PWM0.
sourcepub fn tz1_cbc_int_clr(&mut self) -> TZ1_CBC_INT_CLR_W<'_>
pub fn tz1_cbc_int_clr(&mut self) -> TZ1_CBC_INT_CLR_W<'_>
Bit 22 - Set this bit to clear the interrupt triggered by a cycle-by-cycle mode action on PWM1.
sourcepub fn tz2_cbc_int_clr(&mut self) -> TZ2_CBC_INT_CLR_W<'_>
pub fn tz2_cbc_int_clr(&mut self) -> TZ2_CBC_INT_CLR_W<'_>
Bit 23 - Set this bit to clear the interrupt triggered by a cycle-by-cycle mode action on PWM2.
sourcepub fn tz0_ost_int_clr(&mut self) -> TZ0_OST_INT_CLR_W<'_>
pub fn tz0_ost_int_clr(&mut self) -> TZ0_OST_INT_CLR_W<'_>
Bit 24 - Set this bit to clear the interrupt triggered by a one-shot mode action on PWM0.
sourcepub fn tz1_ost_int_clr(&mut self) -> TZ1_OST_INT_CLR_W<'_>
pub fn tz1_ost_int_clr(&mut self) -> TZ1_OST_INT_CLR_W<'_>
Bit 25 - Set this bit to clear the interrupt triggered by a one-shot mode action on PWM1.
sourcepub fn tz2_ost_int_clr(&mut self) -> TZ2_OST_INT_CLR_W<'_>
pub fn tz2_ost_int_clr(&mut self) -> TZ2_OST_INT_CLR_W<'_>
Bit 26 - Set this bit to clear the interrupt triggered by a one-shot mode action on PWM2.
sourcepub fn cap0_int_clr(&mut self) -> CAP0_INT_CLR_W<'_>
pub fn cap0_int_clr(&mut self) -> CAP0_INT_CLR_W<'_>
Bit 27 - Set this bit to clear the interrupt triggered by capture on channel 0.
sourcepub fn cap1_int_clr(&mut self) -> CAP1_INT_CLR_W<'_>
pub fn cap1_int_clr(&mut self) -> CAP1_INT_CLR_W<'_>
Bit 28 - Set this bit to clear the interrupt triggered by capture on channel 1.
sourcepub fn cap2_int_clr(&mut self) -> CAP2_INT_CLR_W<'_>
pub fn cap2_int_clr(&mut self) -> CAP2_INT_CLR_W<'_>
Bit 29 - Set this bit to clear the interrupt triggered by capture on channel 2.
Methods from Deref<Target = W<INT_CLR_SPEC>>
Trait Implementations
sourceimpl From<W<INT_CLR_SPEC>> for W
impl From<W<INT_CLR_SPEC>> for W
sourcefn from(writer: W<INT_CLR_SPEC>) -> Self
fn from(writer: W<INT_CLR_SPEC>) -> Self
Converts to this type from the input type.
Auto Trait Implementations
Blanket Implementations
sourceimpl<T> BorrowMut<T> for T where
T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more