Struct esp32s3::spi1::clock::CLOCK_SPEC

pub struct CLOCK_SPEC;

SPI_CLK clock division register when SPI1 accesses to flash or Ext_RAM.

This register you can [read] (crate::generic::Reg::read), [write_with_zero] (crate::generic::Reg::write_with_zero), [reset] (crate::generic::Reg::reset), write (crate::generic::Reg::write), [modify] (crate::generic::Reg::modify). See [API] (https://docs.rs/svd2rust/#read–modify–write-api).

For information about available fields see [clock] (index.html) module

Trait Implementations

impl Readable for CLOCK_SPEC

read() method returns [clock::R] (R) reader structure

type Reader = R

Result from a call to read and argument to modify.

impl RegisterSpec for CLOCK_SPEC

type Ux = u32

Raw register type (u8, u16, u32, …).

impl Resettable for CLOCK_SPEC

reset() method sets CLOCK to value 0x0003_0103

fn reset_value() -> Self::Ux

Reset value of the register.

impl Writable for CLOCK_SPEC

write(|w| ..) method takes [clock::W] (W) writer structure

type Writer = W

Writer type argument to write, et al.