Struct esp32s3::pcnt::u_conf0::W

pub struct W(_);

Register U%s_CONF0 writer

Implementations

impl W

pub fn filter_thres(&mut self) -> FILTER_THRES_W<'_, 0>

Bits 0:9 - This sets the maximum threshold, in APB_CLK cycles, for the filter. Any pulses with width less than this will be ignored when the filter is enabled.

pub fn filter_en(&mut self) -> FILTER_EN_W<'_, 10>

Bit 10 - This is the enable bit for unit %s’s input filter.

pub fn thr_zero_en(&mut self) -> THR_ZERO_EN_W<'_, 11>

Bit 11 - This is the enable bit for unit %s’s zero comparator.

pub fn thr_h_lim_en(&mut self) -> THR_H_LIM_EN_W<'_, 12>

Bit 12 - This is the enable bit for unit %s’s thr_h_lim comparator.

pub fn thr_l_lim_en(&mut self) -> THR_L_LIM_EN_W<'_, 13>

Bit 13 - This is the enable bit for unit %s’s thr_l_lim comparator.

pub fn thr_thres0_en(&mut self) -> THR_THRES0_EN_W<'_, 14>

Bit 14 - This is the enable bit for unit %s’s thres0 comparator.

pub fn thr_thres1_en(&mut self) -> THR_THRES1_EN_W<'_, 15>

Bit 15 - This is the enable bit for unit %s’s thres1 comparator.

pub fn ch0_neg_mode(&mut self) -> CH0_NEG_MODE_W<'_, 16>

Bits 16:17 - This register sets the behavior when the signal input of channel 0 detects a negative edge. 1: Increase the counter;2: Decrease the counter;0, 3: No effect on counter

pub fn ch0_pos_mode(&mut self) -> CH0_POS_MODE_W<'_, 18>

Bits 18:19 - This register sets the behavior when the signal input of channel 0 detects a positive edge. 1: Increase the counter;2: Decrease the counter;0, 3: No effect on counter

pub fn ch0_hctrl_mode(&mut self) -> CH0_HCTRL_MODE_W<'_, 20>

Bits 20:21 - This register configures how the CH%s_POS_MODE/CH%s_NEG_MODE settings will be modified when the control signal is high. 0: No modification;1: Invert behavior (increase -> decrease, decrease -> increase);2, 3: Inhibit counter modification

pub fn ch0_lctrl_mode(&mut self) -> CH0_LCTRL_MODE_W<'_, 22>

Bits 22:23 - This register configures how the CH%s_POS_MODE/CH%s_NEG_MODE settings will be modified when the control signal is low. 0: No modification;1: Invert behavior (increase -> decrease, decrease -> increase);2, 3: Inhibit counter modification

pub fn ch1_neg_mode(&mut self) -> CH1_NEG_MODE_W<'_, 24>

Bits 24:25 - This register sets the behavior when the signal input of channel 1 detects a negative edge. 1: Increment the counter;2: Decrement the counter;0, 3: No effect on counter

pub fn ch1_pos_mode(&mut self) -> CH1_POS_MODE_W<'_, 26>

Bits 26:27 - This register sets the behavior when the signal input of channel 1 detects a positive edge. 1: Increment the counter;2: Decrement the counter;0, 3: No effect on counter

pub fn ch1_hctrl_mode(&mut self) -> CH1_HCTRL_MODE_W<'_, 28>

Bits 28:29 - This register configures how the CH%s_POS_MODE/CH%s_NEG_MODE settings will be modified when the control signal is high. 0: No modification;1: Invert behavior (increase -> decrease, decrease -> increase);2, 3: Inhibit counter modification

pub fn ch1_lctrl_mode(&mut self) -> CH1_LCTRL_MODE_W<'_, 30>

Bits 30:31 - This register configures how the CH%s_POS_MODE/CH%s_NEG_MODE settings will be modified when the control signal is low. 0: No modification;1: Invert behavior (increase -> decrease, decrease -> increase);2, 3: Inhibit counter modification

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register.

Methods from Deref<Target = W<U_CONF0_SPEC>>

pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self

Writes raw bits to the register.

Safety

Read datasheet or reference manual to find what values are allowed to pass.

Trait Implementations

impl Deref for W

type Target = W<U_CONF0_SPEC>

The resulting type after dereferencing.

fn deref(&self) -> &Self::Target

Dereferences the value.

impl DerefMut for W

fn deref_mut(&mut self) -> &mut Self::Target

Mutably dereferences the value.

impl From<W<U_CONF0_SPEC>> for W

fn from(writer: W<U_CONF0_SPEC>) -> Self

Converts to this type from the input type.