Struct esp32s3::ledc::timer_conf::W
source · pub struct W(_);
Expand description
Register TIMER%s_CONF
writer
Implementations§
source§impl W
impl W
sourcepub fn duty_res(&mut self) -> DUTY_RES_W<'_, 0>
pub fn duty_res(&mut self) -> DUTY_RES_W<'_, 0>
Bits 0:3 - This register is used to control the range of the counter in timer %s.
sourcepub fn clk_div(&mut self) -> CLK_DIV_W<'_, 4>
pub fn clk_div(&mut self) -> CLK_DIV_W<'_, 4>
Bits 4:21 - This register is used to configure the divisor for the divider in timer %s. The least significant eight bits represent the fractional part.
sourcepub fn pause(&mut self) -> PAUSE_W<'_, 22>
pub fn pause(&mut self) -> PAUSE_W<'_, 22>
Bit 22 - This bit is used to suspend the counter in timer %s.
sourcepub fn rst(&mut self) -> RST_W<'_, 23>
pub fn rst(&mut self) -> RST_W<'_, 23>
Bit 23 - This bit is used to reset timer %s. The counter will show 0 after reset.
sourcepub fn tick_sel(&mut self) -> TICK_SEL_W<'_, 24>
pub fn tick_sel(&mut self) -> TICK_SEL_W<'_, 24>
Bit 24 - This bit is used to select clock for timer %s. When this bit is set to 1 LEDC_APB_CLK_SEL[1:0] should be 1, otherwise the timer clock may be not accurate. 1’h0: SLOW_CLK 1’h1: REF_TICK