1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
#[doc = "Register `EXTMEM_REJECT_ST` reader"]
pub struct R(crate::R<EXTMEM_REJECT_ST_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<EXTMEM_REJECT_ST_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl From<crate::R<EXTMEM_REJECT_ST_SPEC>> for R {
    #[inline(always)]
    fn from(reader: crate::R<EXTMEM_REJECT_ST_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Field `EXTMEM_REJECT_ATRR` reader - The reject accessing. Bit 0: if this bit is 1, the rejected accessing is READ. Bit 1: if this bit is 1, the rejected accessing is WRITE."]
pub type EXTMEM_REJECT_ATRR_R = crate::FieldReader<u8, u8>;
#[doc = "Field `EXTMEM_REJECT_CHANNEL_NUM` reader - The register indicate the reject accessing from which channel."]
pub type EXTMEM_REJECT_CHANNEL_NUM_R = crate::FieldReader<u8, u8>;
#[doc = "Field `EXTMEM_REJECT_PERI_NUM` reader - This register indicate reject accessing from which peripheral."]
pub type EXTMEM_REJECT_PERI_NUM_R = crate::FieldReader<u8, u8>;
impl R {
    #[doc = "Bits 0:1 - The reject accessing. Bit 0: if this bit is 1, the rejected accessing is READ. Bit 1: if this bit is 1, the rejected accessing is WRITE."]
    #[inline(always)]
    pub fn extmem_reject_atrr(&self) -> EXTMEM_REJECT_ATRR_R {
        EXTMEM_REJECT_ATRR_R::new((self.bits & 3) as u8)
    }
    #[doc = "Bits 2:5 - The register indicate the reject accessing from which channel."]
    #[inline(always)]
    pub fn extmem_reject_channel_num(&self) -> EXTMEM_REJECT_CHANNEL_NUM_R {
        EXTMEM_REJECT_CHANNEL_NUM_R::new(((self.bits >> 2) & 0x0f) as u8)
    }
    #[doc = "Bits 6:11 - This register indicate reject accessing from which peripheral."]
    #[inline(always)]
    pub fn extmem_reject_peri_num(&self) -> EXTMEM_REJECT_PERI_NUM_R {
        EXTMEM_REJECT_PERI_NUM_R::new(((self.bits >> 6) & 0x3f) as u8)
    }
}
#[doc = "Reject status accessing external RAM\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extmem_reject_st](index.html) module"]
pub struct EXTMEM_REJECT_ST_SPEC;
impl crate::RegisterSpec for EXTMEM_REJECT_ST_SPEC {
    type Ux = u32;
}
#[doc = "`read()` method returns [extmem_reject_st::R](R) reader structure"]
impl crate::Readable for EXTMEM_REJECT_ST_SPEC {
    type Reader = R;
}
#[doc = "`reset()` method sets EXTMEM_REJECT_ST to value 0"]
impl crate::Resettable for EXTMEM_REJECT_ST_SPEC {
    const RESET_VALUE: Self::Ux = 0;
}